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| motorola semiconductor technical data MC68175 order this document by: MC68175/d ? motorola, inc. 1996, 1997 this document contains information on a new product. specifications and information herein are subject to change without notice. rev. 1 advance information flexchip? signal processor the flex? protocol is a multi-speed, high-performance protocol adopted by leading service providers worldwide as a de facto paging standard. the flex protocol gives service providers the increased capacity, added reliability, and enhanced pager battery performance they need today. it also provides an upward migration path to the service provider that is completely transparent to the end user. the MC68175 flexchip? ic is part of a total solution available from motorola for providing flex capabilities in a low-power, low-cost system. the flexchip simplifies implementation of a flex paging device by interfacing with any of several off-the-shelf paging receivers, such as the mc13150 or mc3374, and any of several off-the-shelf host microcontroller/microprocessors. the primary function of the flexchip is to process information received and demodulated from a flex-radio paging channel, select messages addressed to the paging device, and communicate the message information to the host. the host interprets the message information in an appropriate manner (numeric, alphanumeric, binary, etc.) and handles all the i/o activity. the flexchip ic also operates the paging receiver in an efficient power consumption mode and enables the host to operate in a low power mode when message information for the paging device is not being received. figure 1 shows the MC68175 functional block diagram. figure 1 MC68175 functional block diagram 76.8 khz oscillator clock symbol sync sync correlator de-interleaver address receiver noise detector internal control error local message filter spi buffer spi control/status registers unit external comparator control exts0 exts1 symclk xtal extal clkout s0Cs7 v dd v ss reset lobat ready spi 8 4 control unit corrector aa0813 oscpd 2 2
ii MC68175 technical data sheet, rev. 1 motorola table of contents section 1 signal/connection descriptions . . . . . . . . . . . . . . . . . . . . . 1-1 section 2 specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 section 3 packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 section 4 design considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 section 5 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1 appendix a flex signal overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . a-1 appendix b spi packet description and handling . . . . . . . . . . . . . . . b-1 appendix c flexchip ic application notes . . . . . . . . . . . . . . . . . . . . . . . c-1 for technical assistance: telephone: 1-800-521-6274 email: dsphelp@dsp.sps.mot.com internet: http://www.motorola-dsp.com data sheet conventions t his data sheet uses the following conventions: overbar used to indicate a signal that is active when pulled low (for example, the reset pin is active when low.) asserted means that a high true (active high) signal is high or that a low true (active low) signal is low deasserted means that a high true (active high) signal is low or that a low true (active low) signal is high examples: signal/symbol logic state signal state voltage pin true asserted v il /v ol pin false deasserted v ih /v oh pin true asserted v ih /v oh pin false deasserted v il /v ol note: values for v il , v ol , v ih , and v oh are defined by individual product specifications. MC68175 features motorola MC68175 technical data sheet, rev. 1 iii features ? flex paging protocol signal processor ? sixteen programmable user address words ? sixteen fixed temporary addresses ? 1600-, 3200-, and 6400-bits-per-second decoding ? any-phase or single-phase decoding ? uses standard serial peripheral interface (spi) in slave mode ? allows low current stop mode operation of host processor ? highly programmable receiver control ? real-time clock time base ? flex software fragmentation and group messaging support ? real time clock over-the-air update support ? compatible with synthesized receivers ? low battery indication (external detector) ? 1.8 to 3.3 v low power operation ? 32-pin thin quad flat pack (tqfp) package additional support flex system software from motorola is a family of software components for building world- class products incorporating messaging capabilities. flexstack? software is specifically designed to support the flexchip ic. flexstack software runs on a products host processor and takes care of communicating with the flexchip ic and fully interpreting the codewords that are passed to the host from the flexchip ic. documentation this document is the primary document supporting the MC68175 flexchip ic. documentation is available from a local motorola distributor, a motorola semiconductor sales office, a motorola literature distribution center, or through the motorola dsp home page on the internet (the source for the latest information). iv MC68175 technical data sheet, rev. 1 motorola MC68175 documentation motorola MC68175 technical data sheet, rev. 1 1-1 section 1 signal/connection descriptions signal groupings the input and output signals of the MC68175 are organized into six functional groups, as shown in table 1-1 and as illustrated in figure 1-1 . figure 1-1 is a diagram of MC68175 signals by functional group. table 1-1 MC68175 functional signal groupings functional group number of signals detailed description power input and monitoring 7 table 1-2 processor clocks 1 table 1-3 reset 1 table 1-4 current symbol inputs 2 table 1-5 serial peripheral interface (spi) 5 table 1-6 receiver control port 8 table 1-7 1-2 MC68175 technical data sheet, rev. 1 motorola signal/connection descriptions power input and monitoring power input and monitoring figure 1-1 signals identified by functional group table 1-2 power input, monitoring, and control signals power name description v dd power v dd is the input power for the ic. v ss ground v ss is ground connection for the ic. lobat low battery lobat provides an input signal to indicate to the ic when external battery power is going low. 38.4 khz symbol clock external input external output oscillator power down power: input power ground low battery detect clkout symclk extal xtal oscpd 4 hardware reset reset receiver control port s0Cs7 8 2 serial peripheral interface (spi) sck ss mosi miso ready MC68175 current symbol msb current symbol lsb exts1 exts0 aa1220 v dd v ss lobat signal/connection descriptions processor clock motorola MC68175 technical data sheet, rev. 1 1-3 processor clock reset current symbol inputs table 1-3 processor clock signals signal name type state during reset signal description clkout output indeterminate clock output this is typically a 38.4 khz clock output (derived from 76.8 khz oscillator). symclk output indeterminate recovered symbol clock data is synchronized to the internal clock and this recovered clock output enhances lockon capability by reducing jitter from cable-induced noise. extal input input external clock/crystal input extal interfaces the internal crystal oscillator input to a 76.8 khz crystal input or other external input clock. xtal output indeterminate external clock/crystal output this is typically a 76.8 khz clock output. oscpd input input oscillator power down this input determines whether the internal oscillator is used. connect this pin to v ss when using the 76.8 khz crystal input. connect this pin to v dd when using an external input clock signal. table 1-4 test and reset signals signal name type state during reset signal description reset input input reset this input is a direct hardware reset on the flexchip ic. when reset is asserted low, the flexchip ic is initialized and placed in the reset state. table 1-5 interrupt and mode control signal name type state during reset signal description exts1 input input external symbol 1 this is the most significant bit (msb) of the symbol being tested. exts0 input input external symbol 0 this is the least significant bit (lsb) of the symbol being tested. 1-4 MC68175 technical data sheet, rev. 1 motorola signal/connection descriptions serial peripheral interface (spi) serial peripheral interface (spi) receiver control port table 1-6 serial peripheral interface (spi) signals signal name signal type state during reset signal description sck input input spi serial clock the sck signal is an input, and the clock signal from the external master synchronizes the data transfer. the sck signal is ignored by the spi if the slave select (ss ) signal is not asserted. ss input input spi slave select this signal is used to enable the spi slave for transfer. mosi input input spi master-out-slave-in since the MC68175 is always a slave device, this is the data input for spi communications. the mosi signal is used in conjunction with the miso signal for transmitting and receiving serial data. miso output tri-stated spi master-in-slave-out since the MC68175 is always a slave device, this is the data output for spi communications. the miso signal is used in conjunction with the mosi signal for transmitting and receiving serial data. ready output output, driven high spi ready this signal is driven low when the flexchip ic is ready for an spi packet. table 1-7 receiver control port signals signal name signal type state during reset signal description s0Cs7 output tri-stated serial port 0Cserial port 7 these signals are the eight receiver control ports. motorola MC68175 technical data sheet, rev. 1 2-1 section 2 specifications introduction the MC68175 is fabricated in high density cmos with transistor-transistor logic (ttl) compatible inputs and outputs. maximum ratings note: in the calculation of timing requirements, adding a maximum value of one specification to a minimum value of another specification does not yield a reasonable sum. a maximum specification is calculated using a worst case variation of process parameter values in one direction. the minimum specification is calculated using the worst case for the same parameters in the opposite direction. therefore, a maximum value for a specification will never occur in the same device that has a minimum value for another specification; adding a maximum to a minimum represents a condition that can never exist. caution this device contains circuitry protecting against damage due to high static voltage or electrical fields; however, normal precautions should be taken to avoid exceeding maximum voltage ratings. reliability is enhanced if unused inputs are tied to an appropriate logic voltage level (e.g., either gnd or v cc ). 2-2 MC68175 technical data sheet, rev. 1 motorola specifications thermal characteristics thermal characteristics table 2-1 maximum ratings rating 1 symbol value 1, 2 unit supply voltage v cc - 0.3 to +3.6 v all input voltages v in gnd - 0.5 to v cc + 0.5 v current drain per pin excluding v dd and v ss i10ma operating temperature range t a C30 to +85 ? c storage temperature t stg C55 to +150 ? c notes: 1. gnd = 0 v, v cc = 1.8 to 3.3 v, t a = 0 c to +70 c 2. absolute maximum ratings are stress ratings only, and functional operation at the maximum is not guaranteed. stress beyond the maximum rating may affect device reliability or cause permanent damage to the device. table 2-2 thermal characteristics characteristic symbol tqfp value unit junction-to-ambient thermal resistance r q ja or q ja 95 ? c/w thermal characterization parameter y jt 21 ? c/w note: junction-to-ambient thermal resistance is based on measurements on a horizontal, single-sided printed circuit board per semi g38-87 in natural convection.(semi is semiconductor equipment and materials international, 805 east middlefield rd., mountain view, ca 94043, (415) 964-5111) values were measured with the parts mounted on thermal test boards meeting the specification eia/jesd51-3. specifications dc electrical characteristics motorola MC68175 technical data sheet, rev. 1 2-3 dc electrical characteristics ac electrical characteristics the timing waveforms in the ac electrical characteristics are tested with a v il maximum of 0.2 v dd in v and a v ih minimum of 0.7 v dd in v for all inputs. ac timing specifications that are referenced to a device input signal are measured in production with respect to the 50% point of the respective input signals transition. MC68175 output levels are measured with the production test machine v ol and v oh reference levels set at 0.3 v dd in v and 0.6 v dd in v, respectively. table 2-3 dc electrical characteristics characteristics symbol min typ max unit supply voltage v cc 1.8 2.0 or 3.3 3.6 v input high voltage reset , ss , sck, mosi all other inputs v ih 0.75 v dd 0.7 v dd v cc v cc v v input low voltage v il 0.2 v dd v input leakage current i in C0.25 0.25 m a high impedance (off-state) input current (@ 1.44 v /0.3 v) i tsi C10 +10 m a output high voltage (i oh = C1.0 ma) v oh 0.8 v dd v output low voltage (i ol = 2.8 ma) v ol 0.3 v internal supply current i cc 100 m a input capacitance c in 10 pf note: the internal supply current value is for static i cc . 2-4 MC68175 technical data sheet, rev. 1 motorola specifications initialization timing initialization timing (vcc = 1.8 to 3.6 v, ta = C3 0 to + 85 c) table 2-4 initialization timing characteristic conditions symbol min max unit oscillator start-up time t start 5 sec reset hold time t reset 200 ns reset high to ready low t rhrl 76,800 76,800 t oscillator warmed up to ready low c l = 50pf t owrl 1 sec note: t is one period of the 76.8 khz clock source. from power-up, the oscillator start-up time can impact the availability and period of clock strobes. this can affect the actual reset high to ready low timing. figure 2-1 startup timing t start v dd reset oscillator read y t owrl aa1221 t reset t rhrl specifications reset timing motorola MC68175 technical data sheet, rev. 1 2-5 reset timing (vcc = 1.8 to 3.6 v, ta = C30 to 85 c) table 2-5 reset timing characteristic conditions symbol min max unit reset pulse width t rl 200 ns reset low to ready high t rlrh 200 ns reset high to ready low requires stable 76.8 khz clock source t rhrl 1 sec figure 2-2 reset timing reset read y t rlrh aa1222 t rl t rhrl 2-6 MC68175 technical data sheet, rev. 1 motorola specifications serial peripheral interface (spi) timing serial peripheral interface (spi) timing (v cc = 1.8 to 3.6 v, t a = C30 to +85 c ) table 2-6 spi timing characteristic conditions symbol min max unit operating frequency f op 0 1 mhz cycle time t cyc 1000 ns select lead time t lead1 200 ns de-select lag time t lag1 200 ns select-to-ready time previous packet did not program an address word; c l = 50 pf t rdy 80 m s select-to-ready time previous packet programmed an address word; c l = 50 pf t rdy 420 m s ready high time t rh 50 m s ready lead time t lead2 200 ns not ready lag time c l = 50pf t lag2 200 ns mosi data setup time t su 200 ns mosi data hold time t hi 200 ns miso access time c l = 50pf t ac 0 200 ns miso disable time t dis 300 ns miso data valid time c l = 50pf t v 200 ns miso data hold time t ho 0ns ss high time t ssh 200 ns sck high time t sckh 300 ns sck low time t sckl 300 ns sck rise time 20% to 70% v dd t r 1 m s sck fall time 20% to 70% v dd t f 1 m s note: when the host reprograms an address word with a host-to-flexchip packet id > 127 (decimal), there may be an added delay before flexchip is ready for another packet. specifications serial peripheral interface (spi) timing motorola MC68175 technical data sheet, rev. 1 2-7 figure 2-3 spi timing t ac t lead1 t lag2 t lag1 t sckh ss sck mosi t sckl t su t v t r t dis t ho d31 d31 d0 d0 read y t lead2 t rdy t ssh t rh aa1223 tri- stated miso t cyc t f tri- stated t hi 2-8 MC68175 technical data sheet, rev. 1 motorola specifications serial peripheral interface (spi) timing motorola MC68175 technical data sheet, rev. 1 3-1 section 3 packaging pin-out and package information this sections provides information about the available packages for this product, including diagrams of the package pinouts and tables describing how the signals described in section 1 are allocated. the MC68175 is available in a 32-pin thin quad flat pack (tqfp) package. 3-2 MC68175 technical data sheet, rev. 1 motorola packaging pin-out and package information tqfp package description top and bottom views of the tqfp package are shown in figure 3-1 and figure 3-2 with their pin-outs. figure 3-1 MC68175 thin quad flat pack (tqfp), top view orientation mark 9 (top view) 8 16 24 17 25 1 32 nc oscpd v dd v ss xtal v ss v ss extal reset s0 s1 s2 s3 s5 nc s4 s6 s7 symclk v dd exts0 lobat nc exts1 nc ready ss sck v ss miso clkout mosi aa1341 packaging pin-out and package information motorola MC68175 technical data sheet, rev. 1 3-3 figure 3-2 MC68175 thin quad flat pack (tqfp), bottom view nc oscpd v dd v ss xtal v ss v ss extal orientation mark (bottom view) 9 8 16 24 17 25 1 32 reset s0 s1 s2 s3 s5 nc s4 s6 s7 symclk v dd exts0 lobat nc exts1 nc ready ss sck v ss miso clkout mosi aa1342 3-4 MC68175 technical data sheet, rev. 1 motorola packaging pin-out and package information table 3-1 signal by pin number pin # signal name pin # signal name pin # signal name pin # signal name 1nc 1 9nc 1 17 nc 1 25 nc 1 2 oscpd 10 lobat 18 s5 26 ready 3v dd 11 exts1 19 s4 27 ss 4v ss 2 12 exts0 20 s3 28 sck 5 xtal 13 v dd 21 s2 29 v ss 2 6 extal 14 symclk 22 s1 30 mosi 7v ss 2 15 s7 23 s0 31 miso 8v ss 2 16 s6 24 reset 32 clkout notes: 1. nc indicates reserved pins. these pins must not be connected to any external line. 2. to ensure proper chip operation, all v ss pins must be connected to gnd. table 3-2 signal by name signal name pin # signal name pin # signal name pin # signal name pin # clkout 32 nc 9 s2 21 symclk 14 extal 6 nc 17 s3 20 v dd 3 exts0 12 nc 25 s4 19 v dd 13 exts1 11 oscpd 2 s5 18 v ss 4 lobat 10 ready 26 s6 16 v ss 7 miso 31 reset 24 s7 15 v ss 8 mosi 30 s0 23 sck 28 v ss 29 nc 1 s1 22 ss 27 xtal 5 packaging pin-out and package information motorola MC68175 technical data sheet, rev. 1 3-5 figure 3-3 32-pin thin quad flat pack (tqfp) mechanical information case 873a-02 issue a date 12/16/93 detail y a s1 v b 1 8 9 17 25 32 ae ae p detail y base n j d f metal section ae-ae g seating plane r q w k x 0.250 gauge plane e c h detail ad notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. datum plane -ab- is located at bottom of lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums -t-, -u-, and -z- to be determined at datum plane -ab-. 5. dimensions s and v to be determined at seating plane -ac-. 6. dimensions a and b do not include mold protrusion. allowable protrusion is 0.250 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane -ab-. 7. dimension d does not include dambar protrusion. dambar protrusion shall not cause the d dimension to exceed 0.520. 8. minimum solder plate thickness shall be 0.0076. 9. exact shape of each corner may vary from depiction. dim a min max 7.000 bsc millimeters b 7.000 bsc c 1.400 1.600 d 0.300 0.450 e 1.350 1.450 f 0.300 0.400 g 0.800 bsc h 0.050 0.150 j 0.090 0.200 k 0.500 0.700 m 12 ? ref n 0.090 0.160 p 0.400 bsc q 1 ?? 5 ? r 0.150 0.250 v 9.000 bsc v1 4.500 bsc ? detail ad a1 b1 v1 4x s 4x b1 3.500 bsc a1 3.500 bsc s 9.000 bsc s1 4.500 bsc w 0.200 ref x 1.000 ref 9 -t- -z- -u- t-u 0.20 z ac t-u 0.20 z ab 0.10 ac -ac- -ab- m 8x -t-, -u-, -z- t-u m 0.20 z ac 3-6 MC68175 technical data sheet, rev. 1 motorola packaging ordering drawings ordering drawings complete mechanical information regarding MC68175 packaging is available by facsimile through motorola's mfax? system. call the following number to obtain information by facsimile: the mfax automated system requests the following information: ? the receiving facsimile telephone number including area code or country code ? the callers personal identification number (pin) note: for first time callers, the system provides instructions for setting up a pin, which requires entry of a name and telephone number. ? the type of information requested: C instructions for using the system C a literature order form C specific part technical information or data sheets C other information described by the system messages a total of three documents may be ordered per call. the MC68175 32-pin tqfp package mechanical drawing is referenced as 873a-02. (602) 244-6609 motorola MC68175 technical data sheet, rev. 1 4-1 section 4 design considerations thermal design considerations an estimation of the chip junction temperature, t j , in c can be obtained from the equation: equation 1: where: t a = ambient temperature ?c r q ja = package junction-to-ambient thermal resistance ?c/w p d = power dissipation in package historically, thermal resistance has been expressed as the sum of a junction-to-case thermal resistance and a case-to-ambient thermal resistance: equation 2: where: r q ja = package junction-to-ambient thermal resistance ?c/w r q jc = package junction-to-case thermal resistance ?c/w r q ca = package case-to-ambient thermal resistance ?c/w r q jc is device-related and cannot be influenced by the user. the user controls the thermal environment to change the case-to-ambient thermal resistance, r q ca . for example, the user can change the air flow around the device, add a heat sink, change the mounting arrangement on the printed circuit board (pcb), or otherwise change the thermal dissipation capability of the area surrounding the device on a pcb. this model is most useful for ceramic packages with heat sinks; some 90% of the heat flow is dissipated through the case to the heat sink and out to the ambient environment. for ceramic packages, in situations where the heat flow is split between a path to the case and an alternate path through the pcb, analysis of the device thermal performance may need the additional modeling capability of a system level thermal simulation tool. t j t a p d r q ja () + = r q ja r q jc r q ca + = 4-2 MC68175 technical data sheet, rev. 1 motorola design considerations thermal design considerations the thermal performance of plastic packages is more dependent on the temperature of the pcb to which the package is mounted. again, if the estimations obtained from r q ja do not satisfactorily answer whether the thermal performance is adequate, a system level model may be appropriate. a complicating factor is the existence of three common ways for determining the junction-to-case thermal resistance in plastic packages: ? to minimize temperature variation across the surface, the thermal resistance is measured from the junction to the outside surface of the package (case) closest to the chip mounting area when that surface has a proper heat sink. ? to define a value approximately equal to a junction-to-board thermal resistance, the thermal resistance is measured from the junction to where the leads are attached to the case. ? if the temperature of the package case (t t ) is determined by a thermocouple, the thermal resistance is computed using the value obtained by the equation (t j C t t )/p d . as noted above, the junction-to-case thermal resistances quoted in this data sheet are determined using the first definition. from a practical standpoint, that value is also suitable for determining the junction temperature from a case thermocouple reading in forced convection environments. in natural convection, using the junction-to-case thermal resistance to estimate junction temperature from a thermocouple reading on the case of the package will estimate a junction temperature slightly hotter than actual temperature. hence, the new thermal metric, thermal characterization parameter or y jt , has been defined to be (t j C t t )/p d . this value gives a better estimate of the junction temperature in natural convection when using the surface temperature of the package. remember that surface temperature readings of packages are subject to significant errors caused by inadequate attachment of the sensor to the surface and to errors caused by heat loss to the sensor. the recommended technique is to attach a 40-gauge thermocouple wire and bead to the top center of the package with thermally conductive epoxy. design considerations application design considerations motorola MC68175 technical data sheet, rev. 1 4-3 application design considerations the flexchip ic connects to a receiver capable of converting a four-level audio signal into a 2-bit digital signal. the flexchip ic has eight receiver control lines used for warming up and shutting down a receiver in stages. the flexchip ic has dual bandwidth control signals for two post detection filter bandwidths for receiving the two symbol rates of the flex signal. the flexchip ic has the ability to detect a low battery signal during the receiver control sequences. it interfaces to a host mcu through a standard spi. it has a 38.4 khz clock output capable of driving other devices. it has a 1 minute timer that offers low power support for time of day function on the host. figure 4-1 shows a typical application block diagram. figure 4-1 flexchip system block diagram spi MC68175 flexchip ic decoder a/d converter audio 38.4 khz clock out rf mc13141 mc13142 mmbr941 mc13150 mc3367 mc3374 mc68hc05xxhc08xx mc68hc11/hc12/hc16xx mc683xx/mpc5xx/8xx api flexstack? software data ready receiver control 76.8 khz oscillator analog to digital converter user interface lna if host microprocessor aa0814 4-4 MC68175 technical data sheet, rev. 1 motorola design considerations application design considerations figure 4-2 shows a recommended circuit for a 76.8 khz crystal input. appendix a of this document provides a background of the flex signal protocol. appendix b provides a description of the way in which the MC68175 flexchip ic handles packets through the spi, including sections that describe transfer from the host to the decoder from the decoder to the host. appendix c provides a sample application to illustrate how the MC68175 flexchip ic might be used in an application. figure 4-2 input circuit for 76.8 khz crystal aa1069 extal r2 10 m w 0 w r1 ex: ut200 crystal sanyo 10 pf c2 c1 10 pf xtal note: r1 can be increased in size to be used as a current limiter, if needed. motorola MC68175 technical data sheet, rev. 1 5-1 section 5 ordering information consult a motorola semiconductor sales office or authorized distributor to determine product availability and to place an order. table 5-1 ordering information part supply voltage package type pin count frequency (mhz) order number MC68175 2/3 v thin quad flat pack (tqfp) 32 1 MC68175fa 5-2 MC68175 technical data sheet, rev. 1 motorola ordering information motorola MC68175 technical data sheet, rev. 1 a-1 appendix a flex overview flex signal structure as shown in figure a-1 , a flex signal is transmitted on a radio channel and consists of a series of four-minute cycles, each cycle having 128 frames at 1.875 seconds per frame. a pager may be assigned to process any number of these frames. any unassigned frames are not processed, thus reducing power required for signal processing and extending battery life. if required, however, the pager may temporarily process more complex information, because individual flex cycles can assign additional frames dynamically using collapse, fragmentation, temporary addressing, or carry-on information within the flex signal. figure a-1 flex? signal structure block 0 frame 127 frame 0 frame 1 frame 2 frame 3 frame 4 frame 125 frame 126 frame 127 sync 1 frame info sync 2 one frame = 1.875 s. one block = one cycle = 4 minutes word number 0 to 7 block 9 word number 72 to 79 block 10 word number 80 to 87 160 ms aa1226 a-2 MC68175 technical data sheet, rev. 1 motorola flex overview flex frame structure flex frame structure as shown in figure a-1 on page a-1, each flex frame consists of: ? synchronization portion ? data portioneleven data blocks lasting 160 milliseconds each frame synchronization portion the synchronization portion consists of: ? first synchronization signal at 1600 bps ? frame information word including: C frame number 0C127 (7 bits) C cycle number 0C14 (4 bits) ? second synchronization signal at the data rate of the interleaved portion. first synchronization signal the first synchronization signal is transmitted at 1600 bps and provides a signal to lock onto the specific frame. frame information word the frame information word transmits 11 bits that are divided into a 7-bit frame number and a 4-bit cycle number. this allows the pager to identify the frame and the cycle in which it resides uniquely. flex overview flex frame structure motorola MC68175 technical data sheet, rev. 1 a-3 second synchronization signal the second synchronization signal indicates the rate at which the data portion is transmitted, 1600, 3200 or 6400 bits per second. the 1600 bps rate is transmitted as a single phase of information (a), as shown in figure a-2 , at 1600 symbols per second using 2-level frequency shift keyed (fsk) modulation. the 3200 bps rate is transmitted as two concurrent phases of information (a and c), as shown in figure a-3 , at either: figure a-2 flex? signal structure for 1600 bps biw address field vector field message field idle field 1600 bps phase a block 0 frame 127 frame 0 frame 1 frame 2 frame 3 frame 4 frame 125 frame 126 frame 127 sync 1 frame info sync 2 one frame = 1.875 s. one block = one cycle = 4 minutes word number 0 to 7 block 9 word number 72 to 79 block 10 word number 80 to 87 160 ms aa1227 a-4 MC68175 technical data sheet, rev. 1 motorola flex overview flex frame structure ? 1600 symbols per second using 4-level fsk modulation, or ? 3200 symbols per second using 2-level fsk modulation. figure a-3 flex? signal structure for 3200 bps biw address field vector field message field idle field biw address field vector field message field idle field 3200 bps phase a phase c block 0 frame 127 frame 0 frame 1 frame 2 frame 3 frame 4 frame 125 frame 126 frame 127 sync 1 frame info sync 2 one frame = 1.875 s. one block = one cycle = 4 minutes word number 0 to 7 block 9 word number 72 to 79 block 10 word number 80 to 87 160 ms aa1228 flex overview flex frame structure motorola MC68175 technical data sheet, rev. 1 a-5 the 6400 bps rate is transmitted as four concurrent phases of information (a,b, c, and d), as shown in figure a-4 , at 3200 symbols per second using 4-level fsk modulation. figure a-4 flex? signal structure for 6400 bps biw address field vector field message field idle field biw address field vector field message field idle field biw address field vector field message field idle biw address field vector field message field field phase a phase b phase c phase d 6400 bps block 0 frame 127 frame 0 frame 1 frame 2 frame 3 frame 4 frame 125 frame 126 frame 127 sync 1 frame info sync 2 one frame = 1.875 s. one block = one cycle = 4 minutes word number 0 to 7 block 9 word number 72 to 79 block 10 word number 80 to 87 160 ms aa1229 a-6 MC68175 technical data sheet, rev. 1 motorola flex overview flex frame structure frame data portion as noted above, there are eleven data blocks following the frame synchronization portion of each frame. each block has eight interleaved words per phase, numbered 0C87 contiguously for all eleven blocks, in every frame. each word has information that allows for bit error correction and detection contained within an error correcting code. each of the eighty-eight words in each phase is organized into the following five fields: ? block information field ? address field ? vector field ? message field ? idle field the boundaries between the fields are independent of the block boundaries. furthermore, at 3200 and 6400 bps, the information in one phase is independent of the information in a concurrent phase, and the boundaries between the fields of one phase are unrelated to the boundaries between the fields in a concurrent phase. block information field the block information field may contain information words for determining time and date information and certain paging system information. address field the address field contains addresses assigned to paging devices. addresses are used to identify information sent to individual paging devices and/or groups of paging devices. an address may be either a short one word address or a long two word address. information in the flex signal may indicate that an address is a priority address. an address may be a tone only address, in which case there is no additional information associated with the address. vector field the vector field consists of a series of vector words. depending upon the type of message, a vector word (or words in the case of a long address) may either contain all of the information necessary for the message, or indicate the location of message words in the message field comprising the message information. if an address is not a tone only address, then there is an associated vector word in the vector field. information in the flex signal indicates the location of the vector word. short addresses have one associated vector word and long addresses two associated vector words. a pager may go to low power mode at the end of the address field if its address(es) is (are) not detected, thus resulting in battery savings. flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-7 message field the message field consists of a series of information words containing message information. the message information may be formatted in ascii, bcd, or binary depending upon the message type. the following sections provide a detailed description of the various types of information words that may be used in the message field. idle field the idle field is used to separate blocks. flex message word definitions numeric data message the following tables describe the bit format of the numeric messages. the 4-bit numeric characters of the message are designated as lower case letters a, b, c, d, etc. table a-1 standard (v = 011) or special format (v = 100) 4, 10, 15, 20, 25, 31, 36, or 41 characters message word i0 i1 i2 i3 i4 i5 i6 i7 i8 i9 i10 i11 i12 i13 i14 i15 i16 i17 i18 i19 i20 1st k 4 k 5 a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 c 0 c 1 c 2 c 3 d 0 d 1 d 2 d 3 e 0 e 1 e2 2nd e 3 f 0 f 1 f 2 f 3 g 0 g 1 g 2 g 3 h 0 h 1 h 2 h 3 i 0 i 1 i 2 i 3 j 0 j 1 j 2 j 3 3rd k 0 k 1 k 2 k 3 l 0 l 1 l 2 l 3 m 0 m 1 m 2 m 3 n 0 n 1 n 2 n 3 o 0 o 1 o 2 o 3 q 0 4th q 1 q 2 q 3 r 0 r 1 r 2 r 3 s 0 s 1 s 2 s 3 t 0 t 1 t 2 t 3 u 0 u 1 u 2 u 3 v 0 v 1 5th v 2 v 3 w 0 w 1 w 2 w 3 y 0 y 1 y 2 y 3 z 0 z 1 z 2 z 3 a 0 a 1 a 2 a 3 b 0 b 1 b 2 6th b 3 c 0 c 1 c 2 c 3 d 0 d 1 d 2 d 3 e 0 e 1 e 2 e 3 f 0 f 1 f 2 f 3 g 0 g 1 g 2 g 3 7th h 0 h 1 h 2 h 3 i 0 i 1 i 2 i 3 j 0 j 1 j 2 j 3 v 0 v 1 v 2 v 3 l 0 l 1 l 2 l 3 m 0 8th m 1 m 2 m 3 o 0 o 1 o 2 o 3 p 0 p 1 p 2 p 3 q 0 q 1 q 2 q 3 t 0 t 1 t 2 t 3 u 0 u 1 a-8 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions table a-2 numbered (v = 111) 2, 8, 13, 18, 23, 29, 34, or 39 numeric characters message word i0 i1 i2 i3 i4 i5 i6 i7 i8 i9 i10 i11 i12 i13 i14 i15 i16 i17 i18 i19 i20 1st k 4 k 5 n 0 n 1 n 2 n 3 n 4 n 5 r 0 s 0 a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 c 0 c 1 c 2 2nd c 3 d 0 d 1 d 2 d 3 e 0 e 1 e 2 e 3 f 0 f 1 f 2 f 3 g 0 g 1 g 2 g 3 h 0 h 1 h 2 h 3 3rd i 0 i 1 i 2 i 3 j 0 j 1 j 2 j 3 k 0 k 1 k 2 k 3 l 0 l 1 l 2 l 3 m 0 m 1 m 2 m 3 n 0 4th n 1 n 2 n 3 o 0 o 1 o 2 o 3 q 0 q 1 q 2 q 3 r 0 r 1 r 2 r 3 s 0 s 1 s 2 s 3 t 0 t 1 5th t 2 t 3 u 0 u 1 u 2 u 3 v 0 v 1 v 2 v 3 w 0 w 1 w 2 w 3 y 0 y 1 y 2 y 3 z 0 z 1 z 2 6th z 3 a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 c 0 c 1 c 2 c 3 d 0 d 1 d 2 d 3 e 0 e 1 e 2 e 3 7th f 0 f 1 f 2 f 3 g 0 g 1 g 2 g 3 h 0 h 1 h 2 h 3 i 0 i 1 i 2 i 3 j 0 j 1 j 2 j 3 v 8th v 1 v 2 v 3 l 0 l 1 l 2 l 3 m 0 m 1 m 2 m 3 o 0 o 1 o 2 o 3 p 0 p 1 p 2 p 3 q 0 q 1 table a-3 numeric message bit definitions symbol definition k 6-bit message check character (first 4 bits are in the vector word) this check character is calculated by initializing the message check character ( k ) to 0 and summing the information bits of each code word in the message, (including control information and termination characters and bits in the last message word) to a check sum register. the information bits of each word are broken into three groups: the first is the 8 bits comprising i 0 through i 7 , the second group comprises bits i 8 through i 15 , and the third group comprises bits i 16 through i 20 . bits i 0 , i 8 , and i 16 are the lsbs of each group. the binary sum is calculated, and the result is shortened to the eight least significant bits. the two most significant bits are shifted 6 bits to the right and summed with the six least significant bits to form a new sum. this resultant sum is one's complemented with the six lsbs of the result being transmitted as the message check character. n message number when the system supports message retrieval, the system controller assigns message numbers (for each paging address separately) starting at zero and progressing up to a maximum of sixty-three in consecutive order. the actual maximum roll over number is defined in the pager code plug to accommodate values set in the system infrastructure. when message numbers are not received in order, the subscriber should assume a message has been missed. the subscriber or the pager may determine the missing message number(s) allowing a request to be made for retrieval. when a normal unnumbered numeric message is received (message retrieval flag = 0), it is not to be included in the missed message calculation. flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-9 message fill rules for numeric messages of thirty-six characters or less (thirty-four characters if numbered), fewer than eight code words on the channel are required. only code words containing the numeric message are to be transmitted. the space character (hexadecimal c) should be used to fill any unused 4-bit characters in the last word and zeros to fill any remaining partial characters. the check sum is correspondingly shortened to include only the code words comprising the shortened message along with the space and fill characters used to fill in the last word. special format numeric spaces and dashes as specified by the host are inserted into the received message. this feature in certain markets saves the transmission of an additional word on the channel. as an example, in the u.s. market a 10-character string (area code plus telephone number) fits into two message words; if the dashes or parentheses are to be included in the message, a third message word on the channel is required. the actual placement can be programmed into the paging device and can vary between markets. hex/binary message the following tables describe the bit format of the hex/binary messages. the data of the message is designated as lower case letters a, b, c, d, etc. hex/binary messages can be sent as fragments. the service provider has the option of dividing the message into several pieces and sending the separate pieces at any time within a given time period. r message retrieval flag when this bit is set to 1, the pager expects to see messages numbered in order (each address numbered separately). detection of a missing number indicates a missed message. a message received with r = 0 is allowed to be out of order and shall not cause the pager to indicate that a message has been missed. s special format in the numbered message format, this bit set to 1 indicates that a special display format should be used. table a-3 numeric message bit definitions (continued) symbol definition a-10 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions table a-4 vector type v = 110 first only fragment message word i 0 i 1 i 2 i 3 i 4 i 5 i 6 i 7 i 8 i 9 i 10 i 11 i 12 i 13 i 14 i 15 i 16 i 17 i 18 i 19 i 20 1st k 0 k 1 k 2 k 3 k 4 k 5 k 6 k 7 k 8 k 9 k 10 k 11 c 0 f 0 f 1 n 0 n 1 n 2 n 3 n 4 n 5 2nd r 0 m 0 d 0 h 0 b 0 b 1 b 2 b 3 s 0 s 1 s 2 s 3 s 4 s 0 s 1 s 2 s 3 s 4 s 5 s 6 s 7 3rd a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 c 0 c 1 c 2 c 3 d 0 d 1 d 2 d 3 e 0 e 1 e 2 e 3 f 0 4th f 1 f 2 f 3 g 0 g 1 g 2 g 3 h 0 h 1 h 2 h 3 i 0 i 1 i 2 i 3 j 0 j 1 j 2 j 3 k 0 k 1 5th k 2 k 3 l 0 l 1 l 2 l 3 m 0 m 1 m 2 m 3 n 0 n 1 n 2 n 3 o 0 o 1 o 2 o 3 q 0 q 1 q 2 6th q 3 r 0 r 1 r 2 r 3 s 0 s 1 s 2 s 3 t 0 t 1 t 2 t 3 u 0 u 1 u 2 u 3 v 0 v 1 v 2 v 3 ... nth iiiiiiiiiiiiiiiiiiiii table a-5 vector type v=110 all other fragments message word i0 i1 i2 i3 i4 i5 i6 i7 i8 i9 i10 i11 i12 i13 i14 i15 i16 i17 i18 i19 i20 1st k 0 k 1 k 2 k 3 k 4 k 5 k 6 k 7 k 8 k 9 k 10 k 11 c 0 f 0 f 1 n 0 n 1 n 2 n 3 n 4 n 5 2nd a 0 a 1 a 2 a 3 b 0 b 1 b 2 b 3 c 0 c 1 c 2 c 3 d 0 d 1 d 2 d 3 e 0 e 1 e 2 e 3 f 0 3rd f 1 f 2 f 3 g 0 g 1 g 2 g 3 h 0 h 1 h 2 h 3 i 0 i 1 i 2 i 3 j 0 j 1 j 2 j 3 k 0 k 1 4th k 2 k 3 l 0 l 1 l 2 l 3 m 0 m 1 m 2 m 3 n 0 n 1 n 2 n 3 o 0 o 1 o 2 o 3 q 0 q 1 q 2 5th q 3 r 0 r 1 r 2 r 3 s 0 s 1 s 2 s 3 t 0 t 1 t 2 t 3 u 0 u 1 u 2 u 3 v 0 v 1 v 2 v 3 ... nth iiiiiiiiiiiiiiiiiiiii flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-11 table a-6 hex/binary message bit definitions symbol 1 definition k 12-bit fragment check sum this check sum is calculated by initializing the fragment check sum field ( k ) to 0 and calculating a sum over the information bits of each code word in the message fragment (including control information and termination characters/bits in the last fragment word). this sum requires that the information bits of each word be broken into three groups: the first is the 8 bits comprising i 0 through i 7 , the second group comprises bits i 8 through i 15 , and the third group comprises bits i 16 through i 20 . bits i 0 , i 8 , and i 16 are the lsbs of each group. the binary sum is calculated over all code words in the fragment, the ones complement of the sum is determined, and the twelve lsbs of the result is placed into the fragment check sum field to be transmitted at the beginning of the fragment. c 1-bit message continued flag when set to 1, this flag indicates fragments of this message are to be expected in any or possibly all of the following frames until a fragment with c = 0 is found. the longest message that fits into a frame is eighty-four code words. three alpha characters per word yields a maximum message of 252 characters in a frame, assuming no other traffic. messages longer than this value must be sent as several fragments. f 2-bit message fragment number this is a modulo 3 message fragment number that is incremented by 1 in successive message fragments. the initial fragment starts at 11 and each following fragment is incremented by 1 modulo 3, (11, 00, 01, 10, 00, 01, 10, 00, etc.). the 11 state (after the initial fragment) is skipped in this process to avoid confusion with the single fragment of a non-continued message. the final fragment is indicated by the message continued flag being reset to 0. n message number when the system supports message retrieval the system controller assigns message numbers (for each paging address separately) starting at 0 and progressing up to a maximum of 63 in consecutive order. the actual maximum roll over number is defined in the pager code plug to accommodate values set in the system infrastructure. when message numbers are not received in order, the subscriber should assume a message has been missed. the subscriber or the pager may determine the missing message number(s) allowing a request to be made for retrieval. when a normal unnumbered numeric message is received (message retrieval flag is equal to 0), it is not to be included in the missed message calculation. this number is also used to identify fragments of the same message. multiple messages to the same address must have separate message numbers. an exception to this rule is the header message tied to a transparent message, each with the same message number. r message retrieval flag when this bit is set to 1, the pager expects to see messages numbered in order (each address numbered separately). detection of a missing number indicates a missed message. a message received with r = 0 is allowed to be out of order and not cause the pager to indicate that a message has been missed. m 1-bit mail drop flag when set to 1, this bit indicates the message is to be stored in a special area in memory. it automatically writes over existing data in that memory space. a-12 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions message content starting with the first character of the third word in the message (second word in the remaining fragments), each 4-bit field represents one of any of the sixteen possible combinations with no restrictions (data may be binary). fragment termination unused bits in the last message word of a fragment are filled with all 0s or all 1s, depending on the last valid data bit. this choice is always the opposite polarity of the last valid data bit. for first fragments and inner fragments of a multi-fragment message, the message is interrupted (stopped) on the last full character boundary in the last code word in the fragment. any unused bits follow the rule just stated. the final fragment follows the above rules except when the last character is all 1s or all 0s and it exactly fills the last code word. in this case, an additional word must be sent of d 1-bit display direction field ? d = 0display left to right ? d = 1display right to left (valid only when data sent as characters (i.e., blocking length not equal 0001)). h 1-bit header message ? h = 1indicates that this message is a header to a following transparent message of the same message number ? h = 0implies message is not a header b 4-bit blocking length this bit field indicates the number of bits per character. ? b 3 b 2 b 1 b 0 = 00011 bit per character (binary/transparent data) ? b 3 b 2 b 1 b 0 = 111115 bits per character ? b 3 b 2 b 1 b 0 = 000016 bits per character data with blocking length other than 1 is assumed to be displayed on a character by character basis. (default value = 0001) s 5-bit field reserved for future use default value = 00000 s 8-bit signature field the signature is defined to be the one's complement of the binary sum over the total message taken 8 bits at a time prior to formatting into fragments. it would be equivalent to a binary sum starting with the first 8 bits directly following the signature field ( b 3 b 2 b 1 b 0 a 3 a 2 a 1 a 0 + d 3 d 2 d 1 d 0 c 3 c 2 c 1 c 0 and so on) and continuing all the way to the last valid data bit in the last word of the last fragment. the 8 least significant bits of the result are inverted (one's complement) and transmitted as the message signature. 2 notes: 1. fields r through s are only in the first fragment of a message. the fields k through n make up the first word of every fragment in a long message. 2. this sum does not include any termination bits and should be calculated directly on the message as received by the terminal. the device generating the signature should be able to calculate before the fragmenting boundaries are determined. table a-6 hex/binary message bit definitions (continued) symbol 1 definition flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-13 opposite polarity of all 1s or all 0s to signify the position of the last character, thus allowing that last character to be an all 1s or an all 0s character pattern. note: this is always the case when a binary message ends in the last bit of the last word. message header a message header is designated by setting the h bit to 1. this is a displayable tag associated with a transparent non-displayable data message. the tag and the associated message are complete in themselves. the pager associates the header message with the data file based on the two having the same message number and being sent in sequence (header first followed by data file). alphanumeric message the following tables describe the bit format of the alphanumeric messages. the 7-bit characters of the message are designated as lower case letters a, b, c, d, etc. alphanumeric messages can be sent as fragments. the service provider has the option of dividing the message into several pieces and sending the separate pieces at any time within a given time period. table a-7 vector type v=101 first only fragment message word i 0 i 1 i 2 i 3 i 4 i 5 i 6 i 7 i 8 i 9 i 10 i 11 i 12 i 13 i 14 i 15 i 16 i 17 i 18 i 19 i 20 1st k 0 k 1 k 2 k 3 k 4 k 5 k 6 k 7 k 8 k 9 c 0 f 0 f 1 n 0 n 1 n 2 n 3 n 4 n 5 r 0 m 0 2nd s 0 s 1 s 2 s 3 s 4 s 5 s 6 a 0 a 1 a 2 a 3 a 4 a 5 a 6 b 0 b 1 b 2 b 3 b 4 b 5 b 6 3rd c 0 c 1 c 2 c 3 c 4 c 5 c 6 d 0 d 1 d 2 d 3 d 4 d 5 d 6 e 0 e 1 e 2 e 3 e 4 e 5 e 6 4th f 0 f 1 f 2 f 3 f 4 f 5 f 6 g 0 g 1 g 2 g 3 g 4 g 5 g 6 h 0 h 1 h 2 h 3 h 4 h 5 h 6 5th i 0 i 1 i 2 i 3 i 4 i 5 i 6 j 0 j 1 j 2 j 3 j 4 j 5 j 6 k 0 k 1 k 2 k 3 k 4 k 5 k 6 ... nth iiiiiiiiiiiiiiiiiiiii a-14 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions table a-8 vector type v=101 other fragment message word i 0 i 1 i 2 i 3 i 4 i 5 i 6 i 7 i 8 i 9 i 10 i 11 i 12 i 13 i 14 i 15 i 16 i 17 i 18 i 19 i 20 1st k 0 k 1 k 2 k 3 k 4 k 5 k 6 k 7 k 8 k 9 c 0 f 0 f 1 n 0 n 1 n 2 n 3 n 4 n 5 u 0 v 0 2nd a 0 a 1 a 2 a 3 a 4 a 5 a 6 b 0 b 1 b 2 b 3 b 4 b 5 b 6 c 0 c 1 c 2 c 3 c 4 c 5 c 6 3rd d 0 d 1 d 2 d 3 d 4 d 5 d 6 e 0 e 1 e 2 e 3 e 4 e 5 e 6 f 0 f 1 f 2 f 3 f 4 f 5 f 6 4th g 0 g 1 g 2 g 3 g 4 g 5 g 6 h 0 h 1 h 2 h 3 h 4 h 5 h 6 i 0 i 1 i 2 i 3 i 4 i 5 i 6 5th j 0 j 1 j 2 j 3 j 4 j 5 j 6 k 0 k 1 k 2 k 3 k 4 k 5 k 6 l 0 l 1 l 2 l 3 l 4 l 5 l 6 ... nth iiiiiiiiiiiiiiiiiiiii table a-9 alphanumeric message bit definitions symbol definition k 10-bit fragment check character this check character is calculated by initializing the fragment check character ( k ) to 0 and summing the information bits of each code word in the message fragment (including control information and termination characters and bits in the last message word) to a check sum register. the information bits of each word are broken into three groups: the first is the 8 bits comprising i 0 through i 7 , the second group comprises bits i 8 through i 15 , and the third group comprises bits i 16 through i 20 . bits i 0 , i 8 , and i 16 are the lsbs of each group. the binary sum is calculated, the one's complement of the sum is determined, and the ten lsbs of the result is transmitted as the message check character. c 1-bit message continued flag when set, this flag indicates fragments of this message are to be expected in following frames. the longest message that fits into a frame is 84 code words total. three alpha characters per word yields a maximum message of 252 characters in a frame, assuming no other traffic. messages longer than this value must be sent as several fragments. f 2-bit message fragment number this is a modulo 3 message fragment number that is incremented by 1 in successive message fragments. initial fragments start at 11 and increment 1 for each successive fragment. the 11 state (after the start fragment) is skipped in this process to avoid confusion with an initial fragment of a non-continued message. the final fragment is indicated by message continued flag being cleared. flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-15 message content starting with the second character of the second word in the message (1st character of the second word in all remaining fragments), each 7-bit field represents standard ascii (iso 646-1983e) characters with options for certain international characters. message termination the ascii character etx (03) should be used to fill any unused 7-bit characters in a word. in the case where symbolic characters are being transmitted, special rules for fragment and message termination are defined in the following information on alphanumeric message rules for symbolic characters sets. n message number when the system supports message retrieval, the system controller assigns message numbers (for each paging address separately) starting at 0 and progressing up to a maximum of 63 in consecutive order. the actual maximum roll over number is defined in the pager code plug to accommodate values set in the system infrastructure. when message numbers are not received in order, the subscriber should assume a message has been missed. the subscriber or the pager may determine the missing message number(s), allowing a request to be made for retrieval. when a normal unnumbered numeric message is received (message retrieval flag is equal to 0), it is not to be included in the missed message calculation. this number is also used to identify fragments of the same message. multiple messages to the same address must have separate message numbers. r message retrieval flag when this bit is set, the pager expects to see messages numbered in order (each address numbered separately). detection of a missing number indicates a missed message. a message received with r = 0 is allowed to be out of order and not cause the pager to indicate that a message has been missed. m 1-bit mail drop flag when set, this flag indicates the message is to be stored in a special area in memory. it automatically writes over existing data in that memory space. s 7-bit signature field the signature is defined to be the one's complement of the binary sum over the total message (all fragments) taken 7 bits at a time (on alpha character boundary) starting with the first 7 bits directly following the signature field (a6a5a4a3a2a1a0, b6b5b4b3b2b1b0, etc.). the seven least significant bits of the result are transmitted as the message signature. u , v fragmentation control bits this field exists in all fragments except the first fragment. it is used to support character position tracking in each fragment when symbolic characters (characters made up of 1, 2, or 3 ascii characters) are transmitted using the alphanumeric message type. the default value for the u, v pair is 0, 0. see enhanced fragmentation rules on page a-16 for more information. table a-9 alphanumeric message bit definitions (continued) symbol definition a-16 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions alphanumeric message rules for symbolic characters sets in the past, paging protocols have supported symbolic characters (e.g., chinese, kanji, etc.) using a 7-bit ascii protocol. when the flex alphanumeric mode is used to carry this same signaling format, special fragmenting rules are required to maintain character boundaries, so performance is optimized under poor signal conditions. the following rules allow character positions within a fragment to be determined when prior fragments are missing. enhanced fragmentation rules ? the pager must recognize flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-17 the message into several pieces and sending the separate pieces at any time within a given time period. table a-11 vector type v = 000 all fragments message word i0 i1 i2 i3 i4 i5 i6 i7 i8 i9 i10 i11 i12 i13 i14 i15 i16 i17 i18 i19 i20 1st k 0 k 1 k 2 k 3 k 4 k 5 k 6 k 7 k 8 k 9 c 0 f 0 f 1 n 0 n 1 n 2 n 3 n 4 n 5 s 0 s 1 2nd a 0 a 1 a 2 a 3 a 4 a 5 a 6 b 0 b 1 b 2 b 3 b 4 b 5 b 6 c 0 c 1 c 2 c 3 c 4 c 5 c 6 3rd d 0 d 1 d 2 d 3 d 4 d 5 d 6 e 0 e 1 e 2 e 3 e 4 e 5 e 6 f 0 f 1 f 2 f 3 f 4 f 5 f 6 4th g 0 g 1 g 2 g 3 g 4 g 5 g 6 h 0 h 1 h 2 h 3 h 4 h 5 h 6 i 0 i 1 i 2 i 3 i 4 i 5 i 6 5th j 0 j 1 j 2 j 3 j 4 j 5 j 6 k 0 k 1 k 2 k 3 k 4 k 5 k 6 l 0 l 1 l 2 l 3 l 4 l 5 l 6 ... nth iiiiiiiiiiiiiiiiiiiii table a-12 secure message bit definitions symbol definition k 10-bit fragment check character this check character is calculated by initializing the fragment check character ( k ) to 0 and summing the information bits of each code word in the message fragment (including control information and termination characters and bits in the last message word) to a check sum register. the information bits of each word are broken into three groups: the first is the 8 bits comprising i 0 through i 7 , the second group comprises bits i 8 through i 15 , and the third group comprises bits i 16 through i 20 . bits i 0 , i 8 , and i 16 are the lsbs of each group. the binary sum is calculated, the one's complement of the sum is determined, and the ten lsbs of the result is transmitted as the message check character. c 1-bit message continued flag when set, the message continued flag indicates fragments of this message are to be expected in following frames. the longest message that fits into a frame is 84 code words total. three alpha characters per word yields a maximum message of 252 characters in a frame, assuming no other traffic. messages longer than this value must be sent as several fragments. f 2-bit message fragment number this is a modulo 3 message fragment number that is incremented by 1 in successive message fragments. initial fragments start at 11 and increment 1 for each successive fragment. the 11 state (after the start fragment) is skipped in this process to avoid confusion with an initial fragment of a non-continued message. the final fragment is indicated by message continued flag being cleared. a-18 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions message content starting with the first character of the second word in the message (and 1st character of all remaining fragments), each 7-bit field represents standard ascii (iso 646- 1983e) characters with options for certain international characters. message termination the ascii character etx (03) should be used to fill any unused 7-bit characters in a word. flex encoding and decoding rules the encoding and decoding rules identify the minimum requirements that must be met by the paging device, paging terminal, or other encoding equipment to properly format a flex data stream for rf transmission and to successfully decode it. flex encoding rules ? the stability of the encoder clock used to establish time positions of flex frames must be no worse than 25 ppm (including worst case temperature and aging effects). ? a maximum of two occurrences of an identical individual or radio group address is allowed in any frame for unfragmented messages. this rule applies across all phases in a multi-phase frame. for example, for decoding devices that support any-phase addressing, an any-phase address may appear at once in two different phases in a single multi-phase frame. ? once an individual or radio group address is used to begin transmitting a fragmented message, that same address must not be used to start a new n message number when the system supports message retrieval, the system controller assigns message numbers (for each paging address separately) starting at 0 and progressing up to a maximum of 63 in consecutive order. the actual maximum roll over number is defined in the pager code plug to accommodate values set in the system infrastructure. when message numbers are not received in order, the subscriber should assume a message has been missed. the subscriber or the pager may determine the missing message number(s) allowing a request to be made for retrieval. when a normal unnumbered numeric message is received (message retrieval flag is equal to 0), it is not to be included in the missed message calculation. this number is also used to identify fragments of the same message. multiple messages to the same address must have separate message numbers. s spare bit not used and set to 0 table a-12 secure message bit definitions symbol definition flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-19 fragmented transmission until the first fragmented transmission has been completed. ? for the duration of time that an individual or radio group address is being used to send a fragmented message, that same address must not appear more than once in any frame to send an unfragmented message. ? once a specific dynamic group address (temporary address) is assigned to a group, it must not be reused until its associated message has been transmitted in its entirety. given this constraint, the same dynamic group address can only appear once in any frame. ? a dynamic group address cannot be used to set up a second dynamic group. ? messages using any of the three defined numeric vectors (v 2 v 1 v 0 = 011, 100, and 111) cannot be fragmented, and thus must be completely contained in a single frame. ? fragments of the same message must be sent at a frequency of at least 1 every 32 frames (i.e., at least once a minute) or 1 every 128 frames (i.e., at least once every 4 minutes) as specified by the service provider. ? enhanced message fragmenting for symbolic character transmission requires that the encoder track character boundaries within each fragment in order to avoid character splitting. ? message numbering as an optional feature is offered by some carriers and available on an individual subscriber basis. ? message numbers must be assigned sequentially in ascending order. ? message number sequences must be separately maintained for each individual and radio group address. ? message numbers are not used (retrieval message number disabled) in conjunction with a dynamic group address. ? when a missed message is re-transmitted from message retrieval storage, the message must have r = 0 to avoid creating an out of sequence message that may cause the pager to indicate a missed message. flex decoding rules ? flex decoding devices may implement either single-phase addressing or any-phase addressing. ? flex decoding devices that support the numeric vector type (v 2 v 1 v 0 = 011) must also support the short message vector (v 2 v 1 v 0 = 010) with the message type (t 1 t 0 ) set to 00. ? flex decoding devices that support the alphanumeric vector type (v 2 v 1 v 0 = 101) must support the numeric vector type (v 2 v 1 v 0 = 011) and the short message vector (v 2 v 1 v 0 = 010) with the message type (t 1 t 0 ) set to 00. flex paging devices that implement any-phase and support the alphanumeric a-20 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions vector type (v 2 v 1 v 0 = 101) must also support the short instruction vector (v 2 v 1 v 0 = 001) with the instruction type (i 2 i 1 i 0 ) set to 000. ? flex decoding devices must be capable of decoding frames at all of the following combinations of data rate and modulation mode. they are: 1600 bps, 2 level; 3200 bps, 2 level; 3200 bps, 4 level; 6400 bps, 4 level. ? flex decoding devices must be designed to tolerate 4 minute fragment separation times. flex character sets and rules alphanumeric character set the following tables define the characters to be displayed in the flex alphanumeric message mode. control characters that are not acted upon by the pager are ignored in the display process (do not require display space), but are stored in memory for possible download to an external device. table a-13 alphanumeric character set least significant 4 bits of character most significant 3 bits of character 01234567 0 nul dle sp 0 @ p p 1 sohdc1! 1aqaq 2 stxdc22brbr 3 etxdc3#3cscs 4 eotdc4$4dtdt 5 enqnak%5eueu 6 acksyn&6fvfv 7 beletb 7 gwgw 8 bscan( 8hxhx 9 tabem)9iyiy a lfsub*: jzjz b vtesc+;k[k{ c fffs, a-22 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions table a-15 alternate character set (peoples republic of china option on) character b 3 b 2 b 1 b 0 0 0000 1 0001 2 0010 3 0011 4 0100 5 0101 6 0110 7 0111 8 1000 9 1001 a 1010 b 1011 space 1100 c 1101 d 1110 e 1111 flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-23 flex local time and date the flex protocol allows for systems to transmit time information in its block information field. when a system provider supports local time transmissions, the system provider is required, at a minimum, to transmit at least one time related block information word in each phase transmitted in frame 0, cycle 0. the time transmitted is the local time for the transmitted time zone and refers to the actual time at the leading edge of the first bit of sync 1 of frame 0 of the current cycle. the information carried in the s bits of the block information word depend on the value of the f bits of the block information word. the following sections describe the bit definitions of the time related block information words. month/day/year second/minute/hour table a-16 month/day/year block information word definition f 2 f 1 f 0 s 13 s 12 s 11 s 10 s 9 s 8 s 7 s 6 s 5 s 4 s 3 s 2 s 1 s 0 001 m 3 m 2 m 1 m 0 d 4 d 3 d 2 d 1 d 0 y 4 y 3 y 2 y 1 y 0 note: m = month field 0001 through 1100 (binary) correspond to january through december, respectively d = day field 00001 through 11111 (binary) correspond to 1 through 31, respectively y = year field this represents the year with modulo arithmetic. 00000 through 11111 (binary) representing 1994 through 2025, 2026 through 2057, etc. table a-17 second/minute/hour block information word definition f 2 f 1 f 0 s 13 s 12 s 11 s 10 s 9 s 8 s 7 s 6 s 5 s 4 s 3 s 2 s 1 s 0 010 s 5 s 4 s 3 m 5 m 4 m 3 m 2 m 1 m 0 h 4 h 3 h 2 h 1 h 0 note: s = second field this represents a coarse value of the seconds field. these bits represent the seconds in eighth of a minute (7.5 second) increments. 000 through 111 (binary) correspond to 0 through 52.5 seconds, respectively m = minute field 000000 through 111011 (binary) correspond to 0 through 59, respectively h = hour field 00000 through 10111 (binary) correspond to 0 through 23, respectively. a-24 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions accurate seconds/daylight savings time/time zone table a-18 system message block information word definition f 2 f 1 f 0 s 13 s 12 s 11 s 10 s 9 s 8 s 7 s 6 s 5 s 4 s 3 s 2 s 1 s 0 description 101 s 2 s 1 s 0 xl 0 z 4 z 3 z 2 z 1 z 0 010x system message 1 notes: 1. when the s 3 s 2 s 1 s 0 ?eld is set to 0100 or 0101, the other s 4 through s 13 are de?ned as above. the system messages with the s 3 s 2 s 1 s 0 ?eld set to some other value do not contain time related information. 2. s = accurate seconds this field provides a more accurate seconds reference and can be used to adjust the seconds to within 1 second. this field represents how much time should be added to the coarse seconds in sixty-fourth of a minute increments. l = daylight savings time when this bit is set, the time being transmitted is local standard time. when it is clear, the time being transmitted is daylight savings time. z = time zone these bits indicate the time zone for which the time is being transmitted. the offset from gmt is the offset for local standard time. the following table describes the values for z . table a-19 time zone values z 4 z 3 z 2 z 1 z 0 time zone z 4 z 3 z 2 z 1 z 0 time zone z 4 z 3 z 2 z 1 z 0 time zone 00000 gmt 01011 gmt + 1100 10110 gmt C 1000 00001 gmt + 0100 01100 gmt + 1200 10111 gmt C 0900 00010 gmt + 0200 01101 gmt + 0330 11000 gmt C 0800 00011 gmt + 0300 01110 gmt + 0430 11001 gmt C 0700 00100 gmt + 0400 01111 gmt + 0530 11010 gmt C 0600 00101 gmt + 0500 10000 reserved 11011 gmt C 0500 00110 gmt + 0600 10001 gmt + 0545 11100 gmt C 0400 00111 gmt + 0700 10010 gmt + 0630 11101 gmt C 0300 01000 gmt + 0800 10011 gmt + 0930 11110 gmt C 0200 01001 gmt + 0900 10100 gmt C 0330 11111 gmt C 0100 01010 gmt + 1000 10101 gmt C 1100 flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-25 flex capcodes in order to send messages to a flex decoding device, the flex service provider must know the devices address, the address type (single-phase, any-phase, or all- phase), the addresss assigned phase, the addresss assigned frame, and the addresss battery cycle. this information is typically included in a flex capcode. the assignment of capcodes is regulated to prevent duplication of addresses on a system. check with your flex service provider or other appropriate regulatory body for flex capcode assignments. the following paragraphs describe what these parameters define. the device address consists of one or two 21-bit words. a one-word address is called a short address, while a two-word address is called a long address. address words are separated into ranges according to the following table table a-20 address word range definition type hexadecimal value idle word (illegal address) 000000 long address 1 000001C008000 short address 008001C1e0000 long address 3 1e0001C1e8000 long address 4 1e8001C1f0000 short address (reserved) 1f0001C1f27ff info service address 1f2800C1f67ff network address 1f6800C1f77ff temporary address 1f7800C1f780f operator messaging address 1f7810C1f781f short address (reserved) 1f7820C1f7ffe long address 2 1f7fffC1ffffe idle word (illegal address) 1fffff a-26 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions long addresses are grouped into the sets listed in table a-21 . the address type indicates how messages on a particular address can be delivered in multi-phase flex frames. messages sent on single-phase addresses can only be delivered in a particular phase (a, b, c, or d). messages sent on any-phase addresses can be delivered in any phase, but a single message is limited to a single phase per frame. messages sent on all-phase addresses can be delivered in any phase, and a single message can be spread across multiple phases in a single frame. all-phase messaging is a future feature of flex and has not been completely defined. the assigned phase is required only for single-phase devices. it determines the phase (a, b, c, or d) in which the messages is sent. the assigned frame and battery cycle determine the frames in which the decoding device typically looks for messages (other system factors can cause the decoding device to look in other frames in addition to the typical frames). the battery cycle is a number between 0 and 7 and defines how often the decoding device looks for messages on the flex channel. for a given battery cycle, b, the decoding device looks in every 2 b frames. thus, an address with an assigned frame of 3 and a battery cycle of 5 typically looks for messages in frame 3 and every 32 frames thereafter (i.e., frames 3, 35, 67, and 99). the flex capcode is defined to represent either a short or a long address. the short address is defined in the flex protocol as one code word on the rf channel and is represented by a 7-digit decimal field. the long address is defined in the flex protocol as two code words on the rf channel and is represented by a 9- or 10-digit decimal field. the long addresses in set 1C2 are represented by a 9-digit decimal field. the long addresses in sets 1C3, 1C4, 2C3, and 2C4 are represented by a 10-digit decimal field. an alphabetic character known as the capcode type always precedes the 7-, 9-, or 10-digit decimal address field. the capcode type indicates the type of address and distinguishes flex capcodes from capcodes of other paging protocols. table a-21 long address sets long address set first word second word 1C2 long address 1 long address 2 1C3 long address 1 long address 3 1C4 long address 1 long address 4 2C3 long address 2 long address 3 2C4 long address 2 long address 4 flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-27 capcode type example capcodes are shown in table a-22 . the capcode type can be any of a through l or u through z. the capcode types a through l indicate that the standard rules are used to derive the assigned frame and phase information from the address field. (see standard frame and phase embedding rules on page a-28.) for these capcode types, the battery cycle (indicated as a b in example 1 ) is indicated by a single decimal digit 0 through 7 preceding the capcode type. when the flex standard battery cycle of 4 (16-frame cycle) is used, the battery cycle digit is not required (see example 2 in table a-22 ). the capcode types u through z indicate that the standard frame and phase embedding rules were not used and additional information is required. the phase assignment can be derived from the capcode type, as described in table a-23 on page a-28. the 3-digit decimal frame assignment 000 through 127 (indicated by fff in example 3) and single digit decimal battery cycle 0 through 7 (indicated as a b in example 3 in table a-22 ) may precede this capcode type. the frame and battery cycle fields are not required. when they are not included (see example 4 in table a-22 ), the paging device or the subscriber database must be accessed to determine the assigned frame and battery cycle. the extended capcode is a regular capcode with a 10-digit address field and preceded by an extra alphabetic character p through s. these capcodes are used to provide additional information required for roaming devices. by using the convention of 7 digits to represent short addresses, 9 digits to represent some of the long addresses in set 1C2, and 10 digits to represent the balance of long addresses, it is possible to differentiate between the different types of addresses. the range of the decimal address field consists of the numbers 1 through 5,370,810,366 where short and other single code word addresses fall below 2,031,615 and long addresses are above 2,101,248. the goal in displaying a capcode is to use the shortest form possible. even though the non-standard form could represent a standard assignment, the standard form is chosen to indicate that it is a standard assignment. all capcode forms, except example 4 in table a-22 , contain the information required to send a message to a subscriber unit. table a-22 flex capcode examples example short long extended 1 ba 1234567 ba 123456789 rba 1234567890 2 a 1234567 a 123456789 ra 1234567890 3 fffbu 1234567 fffbu 123456789 rfffbu 1234567890 4 u 1234567 u 123456789 ru 1234567890 a-28 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions standard frame and phase embedding rules maximum battery life in a flex decoding device is achieved when all of the addresses assigned to a device are in the same frame. for single-phase decoding devices, it is a requirement for all assigned addresses to be in the same phase. normally, it is very desirable to spread the population of flex subscriber units on a system across all four phases of all 128 frames. frame and phase spreading can be performed automatically as addresses are assigned sequentially by embedding that information into the 7-, 9-, and 10-digit decimal flex address. the standard procedure for deriving the phase and frame values from the capcode starts by separating the 7-, 9-, or 10-digit decimal address portion (field to the right of the capcode type) and performing a decimal to binary conversion. the least significant bit (lsb) is labeled bit 0. the following bits 2 and 3" in order, specify phases 00, 01, 10, or 11 for phase 0,1,2,3 (a, b, c, d), and bits 4C10 represent frames 000 through 127. the frame and phase can also be derived from the 7-, 9-, or 10-digit decimal address by using modulo arithmetic (base 10) where: phase = (integer (addr/4)) modulo 4 frame = (integer (addr/16)) modulo 128 when these rules are used, and addresses are assigned in order, the phase increments after four consecutive addresses are assigned, while the frame is incremented after sixteen addresses are assigned. capcode alpha character definition the alpha character in the flex capcode indicates the type of decoding device to which the address is assigned. the types include single-phase, any-phase, or all- phase. it also indicates if the address is the first, second, third, or fourth address in the subscriber unit (when addresses are assigned in order and follow standard rules), and specifies the rules for determining in which phase and frame the address is active. table a-23 alpha character codes standard rules no rules (non-standard form) asingle-phase subtract 0 usingle-phase, phase 0 bsingle-phase subtract 1 vsingle-phase, phase 1 csingle-phase subtract 2 wsingle-phase, phase 2 dsingle-phase subtract 3 xsingle-phase, phase 3 flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-29 the following rules apply: ? the character a represents a single-phase subscriber unit using the standard rules for embedding phase and frame. the character b is similar to a, except 1 is subtracted from the capcode before applying the standard rule. likewise, the characters c and d indicate that 2 or 3 is to be subtracted before applying the rule. using these capcode characters ensures that sequentially numbered capcodes are assigned to a common phase and frame. these procedures modify the standard rules and are intended to simplify the order entry process for multiple address subscriber units. when addresses are assigned in order, the subtraction of 1, 2, or 3 ensures that the calculation for each additional address in a decoding device is referenced to the first address. thus, all a, b, c, and d addresses are assigned to the same frame and phase. ? alpha characters e through h and i through l represent any-phase and all-phase subscriber units where the subtract rule is modified to ensure that all addresses of a multiple address subscriber unit are in the same frame. ? for the cases where no rule is defined, the letters u through x indicate single-phase subscriber units assigned to phases 0 through 3 (phases a through d) with the frame and battery cycle explicitly displayed. y and z indicate non-standard addresses for any-phase and all-phase subscriber units. ? if the subscriber unit contains only a single individual address and the user is content with the recommended 30 second battery cycle, then the letter a, e, or i is added as a prefix to the 7-, 9- or 10-digit address, where a = single-phase device, e = any-phase device, and i = all-phase device. eany-phase, subtract 0 yany-phase fany-phase subtract 1 gany-phase subtract 2 hany-phase subtract 3 iall-phase subtract 0 zall-phase jall-phase subtract 1 kall-phase subtract 2 lall-phase subtract 3 table a-23 alpha character codes (continued) standard rules no rules (non-standard form) a-30 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions ? if the unit were to be a two address unit where both addresses are individual addresses, then a, e, or i would again preface the address field of the first address. b, f, or j would preface the second address. the b, f, or j indicates that the address is a second address and it is to have the properties of the first address. this rule eliminates the need for an administrative operator or a salesperson to calculate a starting address, which would allow standard rules to always apply. ? in other cases, especially where a group address is to be included, it is very likely that the u through z forms of the capcode will be used so that the frame can be explicitly chosen to provide best battery life, and the required same phase operation can be met in the case of the single-phase units. capcode to binary conversion short capcode to convert a short address capcode, the number 32,768 is added to the 7-digit decimal capcode address (or to any capcode less than 2,031,615). the resultant number is then converted to a 21-bit binary number, which then becomes the information bits of the (31,21) bch code word transmitted over the air. long capcode 2,101,249 to 1,075,843,072 long address set 1C2 is in this range. to convert a long address capcode, the number 2,068,481 is subtracted from the capcode address. the resultant number is then divided by 32,768 with the remainder, incremented by 1, being the 1st word of the long address. this is the same as calculating the ((capcode C 2,068,481) modulo 32768) + 1. this value is converted to a 21-bit binary number, which becomes the information bits in the (31,21) bch code word transmitted over the air as the 1st address word. the second word of the long address is determined by first calculating the integer portion of the (capcode C 2,068,481) divided by 32,768. this value is then subtracted from 2,097,151 (equivalent to the ones complement of the value in binary), and converted to a 21-bit binary number, which becomes the information bits in the (31, 21) bch code word transmitted over the air as the second address word. long capcode 1,075,843,073 to 3,223,326,720 long address sets 1C3 and 1C4 are in this range. the 1st word of the long address is calculated following the same rules for the long addresses set 1C2. the second long address word is determined by subtracting 2,068,481 from the capcode, the resultant number is divided by 32,768 with the integer portion added to 1,933,312. this value is converted to a 21-bit binary number, which becomes the (31,21) bch code word transmitted over the air as the second address word. flex overview flex message word definitions motorola MC68175 technical data sheet, rev. 1 a-31 long capcode 3,223,326,721 to 4,297,068,542 long address set 2C3 is in this range. the first word is determined by subtracting 2,068,479 from the capcode. the remainder of dividing by 32,768 is retained (i.e., modulo 32,768). this value is then added to 2,064,383 with the result converted to a 21-bit binary number, which becomes the information bits in the (31,21) bch code word transmitted over the air as the 1st address word. the second word is determined by subtracting 2,068,479 from the capcode and finding the integer portion after dividing by 32,768. this value is then added to 1,867,776 and converted to a 21-bit binary number, which becomes the (31,21) bch code word transmitted over the air as the second address word. binary to capcode conversion with the address code word values that are transmitted over the air, the capcode can be calculated by performing the inverse of the above-specified process. as an example, the short address code word is converted to decimal and the number 32,768 is subtracted to arrive at the 7-digit address portion of the capcode. for the two word long address set 1C2, the address word 1 is first converted from binary to decimal. the second address word is then complemented, (or subtracted from 2,097,151 decimal) and converted to a decimal. this value is multiplied by 32,768, added to 2,068,480, and then added to address word 1. the result is the address portion of the flex capcode. a-32 MC68175 technical data sheet, rev. 1 motorola flex overview flex message word definitions capcode assignments the following table defines the address usage assignment. all addresses not listed in this table are not defined and reserved for future use. table a-24 capcode assignment table capcode address value description 0,000,000,000 illegal 0,000,000,001 to 0,001,933,312 short addresses 0,001,933,313 to 0,001,998,848 illegal 0,001,998,849 to 0,002,009,087 reserved for future use 0,002,009,088 to 0,002,025,471 information service addresses 0,002,025,472 to 0,002,029,567 network addresses 0,002,029,568 to 0,002,029,583 temporary addresses 0,002,029,584 to 0,002,029,599 operator messaging addresses 0,002,029,600 to 0,002,031,614 reserved for future use 0,002,031,615 to 0,002,101,248 illegal 0,002,101,249 to 0,102,101,250 long address set 1C2 uncoordinated 0,102,101,251 to 0,402,101,250 long address set 1C2 by country 1 0,402,101,251 to 1,075,843,072 long address set 1C2 global 2 1,075,843,073 to 2,149,584,896 long address set 1C3 global 2 2,149,584,897 to 3,223,326,720 long address set 1C4 global 2 3,223,326,721 to 3,923,326,750 long address set 2C3 by country 1 3,923,326,751 to 4,280,000,00 long address set 2C3 reserved 4,280,000,001 to 4,285,000,000 long address set 2C3 info service 3 global 2 4,285,000,001 to 4,290,000,000 long address set 2C3 info service 3 by country 1 4,290,000,001 to 4,291,000,000 long address set 2C3 info service 3 world-wide use 4 4,291,000,001 to 4,297,068,542 reserved for future use notes: 1. by countrythe addresses are coordinated within each country and with countries along borders. 2. globalthe address is coordinated to be unique worldCwide. 3. info servicerules governing the use of these addresses are not currently de?ned. 4. world wide useone thousand addresses are assigned to each country for world-wide use. motorola MC68175 technical data sheet, rev. 1 b-1 appendix b spi packets all data communicated between the flexchip ic and the host mcu is transmitted on the spi in 32-bit packets. each packet consists of an 8-bit id followed by 24 bits of information. the flexchip ic uses the spi bus in full duplex mode. in other words, whenever a packet communication occurs, the data in both directions is valid packet data. the spi consists of a ready pin and four spi pins (ss , sck, mosi, and miso).the ss is used as a chip select for the flexchip ic. the sck is a clock supplied by the host mcu. the data from the host is transmitted on the mosi line. the data from the flexchip ic is transmitted on the miso line. packet communication initiated by the host when the host sends a packet to the flexchip ic, it performs the following steps (see figure b-1 ): 1. select the flexchip ic by driving the ss pin low. 2. wait for the flexchip ic to drive the ready pin low. 3. send the 32-bit packet. 4. de-select the flexchip ic by driving the ss pin high. 5. repeat steps 1 through 4 for each additional packet. figure b-1 typical multiple packet communications initiated by the host read y ss sck mosi miso high impedance state d31 d0 d1 d31 d0 d1 d31 d0 d1 d31 d0 d1 4 d31 d0 d1 d31 d0 d1 1 2 3 aa1229 b-2 MC68175 technical data sheet, rev. 1 motorola spi packets packet communication initiated by the flexchip ic when the host sends a packet, it will also receive a valid packet from the flexchip ic. if the flexchip ic is enabled (see checksum packet on page b-6.) and has no other packets waiting to be sent, the flexchip ic will send a status packet. the host must transition the ss pin from high to low to begin each 32-bit packet. the flexchip ic must see a negative transition on the ss pin in order for the host to initiate each packet communication. packet communication initiated by the flexchip ic when the flexchip ic has a packet for the host to read, the following occurs (see figure b-2 ): 1. the flexchip ic drives the ready pin low. 2. if the flexchip ic is not already selected, the host selects the flexchip ic by driving the ss pin low. 3. the host receives (and sends) a 32-bit packet. 4. the host de-selects the flexchip ic by driving the ss pin high (optional). when the host is reading a packet from the flexchip ic, it must send a valid packet to the flexchip ic. if the host has no data to send, it is suggested that the host send a checksum packet with all of the data bits set to 0 in order to avoid disabling the flexchip ic. (see checksum packet on page b-6.) figure b-3 on page b-3 illustrates that it is not necessary to de-select the flexchip ic between packets when the packets are initiated by the flexchip ic. figure b-2 typical multiple packet communications initiated by the flexchip ic read y ss sck mosi miso high impedance state d31 d0 d1 d31 d0 d1 d31 d0 d1 d31 d0 d1 4 d31 d0 d1 d31 d0 d1 2 1 3 aa1230 spi packets host-to-decoder packet map motorola MC68175 technical data sheet, rev. 1 b-3 host-to-decoder packet map the upper 8 bits of a packet comprise the packet id. the following table describes the packet ids for all of the packets that can be sent to the flexchip ic from the host. figure b-3 multiple packet communications initiated by the flexchip ic with no de-select table b-1 host-to-decoder packet id map packet id (hexadecimal) packet type 00 checksum 01 configuration 02 control 03 all frame mode 04C0e reserved (host should never send) 0f receiver line control 10 receiver control configuration (off setting) 11 receiver control configuration (warm up 1 setting) 12 receiver control configuration (warm up 2 setting) 13 receiver control configuration (warm up 3 setting) 14 receiver control configuration (warm up 4 setting) read y ss sck mosi miso high impedance state d31 d0 d1 d31 d0 d1 d31 d0 d1 d31 d0 d1 d31 d0 d1 d31 d0 d1 aa1231 b-4 MC68175 technical data sheet, rev. 1 motorola spi packets host-to-decoder packet map 15 receiver control configuration (warm up 5 setting) 16 receiver control configuration (3200sps sync setting) 17 receiver control configuration (1600sps sync setting) 18 receiver control configuration (3200sps data setting) 19 receiver control configuration (1600sps data setting) 1a receiver control configuration (shut down 1 setting) 1b receiver control configuration (shut down 2 setting) 1cC1f special (ignored by flexchip ic) 20 frame assignment (frames 112 through 127) 21 frame assignment (frames 96 through 111) 22 frame assignment (frames 80 through 95) 23 frame assignment (frames 64 through 79) 24 frame assignment (frames 48 through 63) 25 frame assignment (frames 32 through 47) 26 frame assignment (frames 16 through 31) 27 frame assignment (frames 0 through 15) 28C77 reserved (host should never send) 78 user address enable 79C7f reserved (host should never send) 80 user address assignment (user address 0) 81 user address assignment (user address 1) 82 user address assignment (user address 2) 83 user address assignment (user address 3) 84 user address assignment (user address 4) 85 user address assignment (user address 5) table b-1 host-to-decoder packet id map (continued) packet id (hexadecimal) packet type spi packets decoder-to-host packet map motorola MC68175 technical data sheet, rev. 1 b-5 decoder-to-host packet map the following table describes the packet ids for all of the packets that can be sent to the host from the flexchip ic. 86 user address assignment (user address 6) 87 user address assignment (user address 7) 88 user address assignment (user address 8) 89 user address assignment (user address 9) 8a user address assignment (user address 10) 8b user address assignment (user address 11) 8c user address assignment (user address 12) 8d user address assignment (user address 13) 8e user address assignment (user address 14) 8f user address assignment (user address 15) 90Cff reserved (host should never send) table b-2 decoder-to-host packet id map packet id (hexadecimal) packet type 00 block information word 01 address 02C57 vector or message (id is word number in frame) 58C7e reserved 7f status 80Cfe reserved ff part id table b-1 host-to-decoder packet id map (continued) packet id (hexadecimal) packet type b-6 MC68175 technical data sheet, rev. 1 motorola spi packets host-to-decoder packet descriptions host-to-decoder packet descriptions the following sections describe the packets of information sent from the host to the flexchip ic. in all cases the packets should be sent msb first (bit 7 of byte 3 = bit 31 of the packet = msb). checksum packet the checksum packet is used to ensure proper communication between the host and the flexchip ic. the flexchip ic exclusive-ors the 24 data bits of every packet it receives (except the checksum packet and the special packet ids 1c through 1f hexadecimal) with an internal checksum register. upon reset and whenever the host writes a packet to the flexchip ic, the flexchip ic is disabled from sending any information to the host processor until the host processor sends a checksum packet with the proper checksum value (cv) to the flexchip ic. when the flexchip ic is disabled in this way, it prompts the host to read the part id packet. note that all other operation continues normally when the flexchip ic is disabled. the flexchip ic is only disabled in the sense that the data can not be read from the flexchip ic, all other operations continue to function. when the flexchip ic is reset, it is disabled and the internal checksum register is initialized to the 24-bit part id defined in the part id packet. (see part id packet on page b-34.) every time a packet other than the checksum packet and the special packets 1c through 1f is sent to the decoder ic, the value sent in the 24 information bits is exclusive-ored with the internal checksum register, the result is stored back to the checksum register, and the flexchip ic is disabled. if a checksum packet is sent and the cv bits match the bits in the checksum register, the flexchip ic is enabled. if a checksum packet is sent when the flexchip ic is already enabled, the packet is ignored by the flexchip ic, in which case a null packet having the id and data bits set to 0 is suggested. if a packet other than the checksum packet is sent when the flexchip ic is enabled, the decoder ic will be disabled until a checksum packet is sent with the correct cv bits. spi packets host-to-decoder packet descriptions motorola MC68175 technical data sheet, rev. 1 b-7 when the host reads a packet out of the flexchip ic but has no data to send, the checksum packet should be sent so the flexchip ic will not be disabled. the data in the checksum packet could be a null packet, 32-bit stream of all 0s, since a checksum packet will not disable the flexchip ic. when the host re-configures the flexchip ic, the flexchip ic will be disabled from sending any packets other than the part id packet until the flexchip ic is enabled with a checksum packet having the proper data. the id of the checksum packet is 0. figure b-4 flexchip ic checksum flow chart reset disables itself checksum packet? disables itself sets checksum register to the xor of the packet data bits with the checksum n y y n initializes checksum register to part id value waits for spi packet from host initiates part id packet enables itself enabled? y n register bits packet data matches checksum register data? aa1232 b-8 MC68175 technical data sheet, rev. 1 motorola spi packets host-to-decoder packet descriptions configuration packet the configuration packet defines a number of different configuration options for the flexchip ic. the flexchip ic ignores this packet when decoding is enabled (i.e., the on bit in the control packet is set). the id of the configuration packet is 1. oscillator frequency difference (ofd) these bits describe the maximum difference in the frequency of the 76.8 khz oscillator crystal with respect to the frequency of the transmitter. these limits should be the worst case difference in frequency due to all conditions, including but not limited to aging, temperature, and manufacturing tolerance. using a smaller frequency difference in this packet will result in lower power consumption due to higher receiver battery save ratios. note that this value is not the absolute error of the oscillator frequency provided to the flexchip ic. the absolute error of the clock used by the flex transmitter must be taken into account. (if the transmitter tolerance is 25 ppm and the 76.8 khz oscillator tolerance is 140 ppm, the oscillator frequency difference is 165 ppm and ofd should be set to 0.) the value after reset = 0. table b-5 on page b-9 summarizes the bit definitions. table b-3 checksum packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 00000000 2cv 23 cv 22 cv 21 cv 20 cv 19 cv 18 cv 17 cv 16 1cv 15 cv 14 cv 13 cv 12 cv 11 cv 10 cv 9 cv 8 0cv 7 cv 6 cv 5 cv 4 cv 3 cv 2 cv 1 cv 0 note: cv = checksum value table b-4 configuration packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 00000001 2 000000ofd 1 ofd 0 1 000000sp 1 sp 0 0 sme mot cod mte lbp 0 0 0 spi packets host-to-decoder packet descriptions motorola MC68175 technical data sheet, rev. 1 b-9 signal polarity (sp) these bits set the polarity of exts1 and exts0 input signals. the value after reset = 0. the polarity of the exts0 and exts1 bits will be determined by the receiver design. synchronous mode enable (sme) when this bit is set, a status packet will be automatically sent whenever the smu (synchronous mode update) bit in the status packet is set. the host can use the sm (synchronous mode) bit in the status packet as an in-range/out-of-range indication. the value after reset = 0. maximum off time (mot) when this bit is clear, the flexchip ic assumes that there can be at most 4 minutes between transmitted frames on the paging system. when this bit is set, the flexchip ic assumes that there can be at most 1 minute between transmitted frames on the paging system. this setting is determined by the service provider. the value after reset = 0. clock output disable (cod) when this bit is clear, a 38.4 khz signal will be output on the clkout pin. when this bit is set, the clkout pin will be driven low. note that setting and clearing this bit can cause pulses on the clkout pin that are less than one half the 38.4 khz period. also note that when the clock output is enabled, the clkout pin will always output table b-5 ofd bits description ofd 1 ofd 0 frequency difference 00 300 ppm 01 150 ppm 10 75 ppm 11 0 ppm table b-6 sp bit definition sp 1 sp 0 signal polarity exts1 exts0 fsk modulation @ sp = 0,0 exts1 exts0 0 0 normal normal + 4800 hz 1 0 0 1 normal inverted +1600 hz 1 1 1 0 inverted normal C1600 hz 0 1 1 1 inverted inverted C4800 hz 0 0 b-10 MC68175 technical data sheet, rev. 1 motorola spi packets host-to-decoder packet descriptions the 38.4 khz signal even when the flexchip ic is in reset (as long as the flexchip ic oscillator is seeing clocks). the value after reset = 0. minute timer enable (mte) when this bit is set, a status packet will be sent at one minute intervals with the mt (minute time-out) bit in the status packet set. when this bit is clear, the internal one- minute timer stops counting. the internal one-minute timer is reset when this bit is changed from 0 to 1 or when the mtc (minute timer clear) bit in the control packet is set. the value after reset = 0. low battery polarity (lbp) this bit defines the polarity of the flexchip ics lobat pin. the lb bit in the status packet is initialized to the inverse value of this bit when the flexchip ic is turned on (by setting the on bit in the control packet). when the flexchip ic is turned on, a low battery update is sent to the host in the status packet when a low battery condition is detected on the lobat pin. setting this bit means that a high on the lobat pin indicates a low voltage condition. the value after reset = 0. control packet the control packet defines a number of different control bits for the flexchip ic. the id of the control packet is 2. force frame (ff) 0C7 these bits enable and disable forcing the flexchip ic to look in frames 0 through 7. when an ff bit is set, the flexchip ic will decode the corresponding frame. unlike the af bits in the frame assignment packets, the system collapse of a flex system will not affect frames assigned using the ff bits. (where as setting af 0 to 1 when the system collapse is 5 will cause the decoder to decode frames 0, 32, 64, and 96, setting ff 0 to 1 when the system collapse is 5 will only cause the decoder to decode frame 0.) this may be useful for acquiring transmitted time information. the value after reset = 0. table b-7 control packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 00000010 2ff 7 ff 6 ff 5 ff 4 ff 3 ff 2 ff 1 ff 0 1 0 spm ps 1 ps 0 0000 0 0 sbi 0 mtc 0 0 0 on spi packets host-to-decoder packet descriptions motorola MC68175 technical data sheet, rev. 1 b-11 single phase mode (spm) when this bit is set, the flexchip ic will decode only one phase of the transmitted data. when this bit is clear, the flexchip ic will decode all of the phases it receives. a change to this bit while the flexchip ic is on, will not take affect until the next block 0 of a frame. the value after reset = 0. phase select (ps) when the spm bit is set, these bits define what phase the flexchip ic should decode according to the following table. this value is determined by the service provider. a change to these bits while the flexchip ic is on, will not take affect until the next block 0 of a frame. the value after reset = 0. send block information (sbi) words 2-4 when this bit is set, any errored or time-related block information words 2C4 will be sent to the host. the value after reset = 0. minute timer clear (mtc) setting this bit will cause the one minute timer to restart from 0. turn on decoder (on) set if the flexchip ic should be decoding flex signals. clear if signal processing should be off (very low power mode). the value after reset = 0. table b-8 phase select bit definition ps value phase decoded (based on flex data rate) ps 1 ps 0 1600 bps 3200 bps 6400 bps 00 a a a 01 a a b 10 a c c 11 a c d b-12 MC68175 technical data sheet, rev. 1 motorola spi packets host-to-decoder packet descriptions all frame mode packet the all frame mode packet is used to decrement temporary address enable counters by one, decrement the all frame mode counter by one, and/or enable or disable forcing all frame mode. if all frame mode is enabled, the flexchip ic will attempt to decode every frame and send a status packet with the eof (end-of-frame) bit set at the end of every frame. all frame mode is enabled if any temporary address enable counter is non-zero, or, the all frame mode counter is non-zero, or, the force all frame mode bit is set. both the all frame mode counter and the temporary address enable counters can only be incremented internally by the flexchip ic and can only be decremented by the host. the flexchip ic will increment a temporary address enable counter whenever a short instruction vector is received assigning the corresponding temporary address. the flexchip ic will increment the all frame mode counter whenever an alphanumeric, hex / binary, or secure vector is received. when the host determines that a message associated with a temporary address, or a fragmented message has ended, then the appropriate temporary address counter or all frame mode counter should be decremented by writing an all frame mode packet to the flexchip ic in order to exit the all frame mode, thereby improving battery life. neither the temporary address enable counters nor the all frame mode counter can be incremented past the value 127 or decremented past the value 0 (i.e., it will not roll over). the temporary address enable counters and the all frame mode counter are initialized to 0 at reset and when the decoder is turned off. the id of the all frame mode packet is 3. decrement all frame (daf) counter setting this bit decrements the all frame mode counter by one. if a packet is sent with this bit clear, the all frame mode counter is not affected. the value after reset = 0. force all frame (faf) mode setting this bit forces the flexchip ic to enter all frame mode. if this bit is clear, the flexchip ic may or may not be in all frame mode depending on the status of the all frame mode counter and the temporary address enable counters. this may be useful in acquiring transmitted time information. the value after reset = 0. table b-9 all frame mode packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 00000011 2daffaf000000 1 dta 15 dta 14 dta 13 dta 12 dta 11 dta 10 dta 9 dta 8 0 dta 7 dta 6 dta 5 dta 4 dta 3 dta 2 dta 1 dta 0 spi packets host-to-decoder packet descriptions motorola MC68175 technical data sheet, rev. 1 b-13 decrement temporary address (dta) enable counter when a bit in this word is set, the corresponding temporary address enable counter is decremented by 1. when a bit is cleared, the corresponding temporary address enable counter is not affected. when a temporary address enable counter reaches 0, the temporary address is disabled.the value after reset = 0. receiver line control packet this packet gives the host control over the settings on the receiver control lines (s0Cs7) in all modes except reset. in reset, the receiver control lines are in high impedance settings. the id for the receiver line control packet is 15 (decimal). force receiver setting (frs) setting a bit to one will cause the corresponding cls bit in this packet to override the internal receiver control settings on the corresponding receiver control line (s0Cs7). clearing a bit gives control of the corresponding receiver control lines (s0Cs7) back to the flexchip ic. the value after reset = 0. control line setting (cls) if the corresponding frs bit was set in this packet, these bits define what setting should be applied to the corresponding receiver control lines. the value after reset = 0. table b-10 receiver line control packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 00001111 2 00000000 1 frs 7 frs 6 frs 5 frs 4 frs 3 frs 2 frs 1 frs 0 0 cls 7 cls 6 cls 5 cls 4 cls 3 cls 2 cls 1 cls 0 b-14 MC68175 technical data sheet, rev. 1 motorola spi packets host-to-decoder packet descriptions receiver control configuration packets these packets allow the host to configure: ? what setting is applied to the receiver control lines s0Cs7, ? how long to apply the setting, and, ? when to read the value of the lobat input pin. for a more detailed description of how the flexchip ic uses these settings see receiver control configuration packets on page b-14 . the flexchip ic defines twelve different receiver control settings. the flexchip ic ignores these packets when decoding is enabled (i.e., the on bit in the control packet is set). the ids for these packets range from 16 to 27 (decimal). low battery check (lbc) if this bit is set, the flexchip ic will check the status of the lobat port just before leaving this receiver state. the value after reset = 0. control line setting (cls) this is the value to be output on the receiver control lines (s0Cs7) for this receiver state. the value after reset = 0. step time (st) this is the time the flexchip ic is to keep the receiver off before applying the first warm up states receiver control value to the receiver control lines. the setting is in steps of 625 m s. valid values are 625 m s (st = 01) to 159.375 ms (st = ff in hexadecimal). (the value after reset = 625 m s) table b-11 receiver off setting packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 00010000 2 0000lbc000 1 cls 7 cls 6 cls 5 cls 4 cls 3 cls 2 cls 1 cls 0 0st 7 st 6 st 5 st 4 st 3 st 2 st 1 st 0 spi packets host-to-decoder packet descriptions motorola MC68175 technical data sheet, rev. 1 b-15 receiver warm up setting packets setting number (s) these bit define the receiver control setting for which this packets values are to be applied. the following truth table shows the names of each of the values for s that apply to this packet. step enable (se) the receiver setting is enabled when the bit is set. if a step in the warm up sequence is disabled, all steps following the disabled step will be ignored. the value after reset = 0. low battery check (lbc) if this bit is set, the flexchip ic will check the status of the lobat port just before leaving this receiver state. the value after reset = 0. control line setting (cls) this is the value to be output on the receiver control lines (s0Cs7) for this receiver state. the value after reset = 0. table b-12 receiver warm up setting packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 0001s 3 s 2 s 1 s 0 2 se000lbc000 1 cls 7 cls 6 cls 5 cls 4 cls 3 cls 2 cls 1 cls 0 00st 6 st 5 st 4 st 3 st 2 st 1 st 0 table b-13 setting number bit combinations s 3 s 2 s 1 s 0 setting name 0 0 0 1 warm up 1 0 0 1 0 warm up 2 0 0 1 1 warm up 3 0 1 0 0 warm up 4 0 1 0 1 warm up 5 b-16 MC68175 technical data sheet, rev. 1 motorola spi packets host-to-decoder packet descriptions step time (st) this is the time the flexchip ic is to wait before applying the next states receiver control value to the receiver control lines. the setting is in steps of 625 m s. valid values are 625 m s (st = 01) to 79.375 ms (st = 7f in hexadecimal) (the value after reset = 625 m s). 3200 sps sync setting packets low battery check (lbc) if this bit is set, the flexchip ic will check the status of the lobat port just before leaving this receiver state. the value after reset = 0. control line setting (cls) this is the value to be output on the receiver control lines (s0Cs7) for this receiver state. the value after reset = 0. step time (st) this is the time the flexchip ic is to wait before expecting good signals on the exts1 and exts0 signals after warming up. the setting is in steps of 625 m s. valid values are 625 m s (st = 01) to 79.375 ms (st = 7f in hexadecimal). (the value after reset = 625 m s.) table b-14 3200 sps sync setting packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 00010110 2 0000lbc000 1 cls 7 cls 6 cls 5 cls 4 cls 3 cls 2 cls 1 cls 0 00st 6 st 5 st 4 st 3 st 2 st 1 st 0 spi packets host-to-decoder packet descriptions motorola MC68175 technical data sheet, rev. 1 b-17 receiver on setting packets setting number (s) these bits define the receiver control setting for which this packets values are to be applied. the following truth table shows the names of each of the values for s that apply to this packet. low battery check (lbc) if this bit is set, the flexchip ic will check the status of the lobat port just before leaving this receiver state. the value after reset = 0. control line setting (cls) this is the value to be output on the receiver control lines (s0Cs7) for this receiver state. the value after reset = 0. table b-15 receiver on setting packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 0001s 3 s 2 s 1 s 0 2 0000lbc000 1 cls 7 cls 6 cls 5 cls 4 cls 3 cls 2 cls 1 cls 0 0 00000000 table b-16 setting number bit definitions s 3 s 2 s 1 s 0 setting name 0111 1600 sps sync 1000 3200 sps data 1001 1600 sps data b-18 MC68175 technical data sheet, rev. 1 motorola spi packets host-to-decoder packet descriptions receiver shut down setting packets setting number (s) these bits define the receiver control setting for which this packets values are to be applied. the following truth table shows the names of each of the values for s that apply to this packet. step enable (se) the receiver setting is enabled when the bit is set. if a step in the shut down sequence is disabled, all steps following the disabled step will be ignored. the value after reset = 0. low battery check (lbc) if this bit is set, the flexchip ic will check the status of the lobat port just before leaving this receiver state. the value after reset = 0. control line setting (cls) this is the value to be output on the receiver control lines (s0Cs7) for this receiver state. the value after reset = 0. step time (st) this is the time the flexchip ic is to wait before applying the next states receiver control value to the receiver control lines. the setting is in steps of 625us. valid values are 625 m s (st = 01) to 39.375 ms (st = 3f in hexadecimal). (the value after reset = 625 m s.) table b-17 receiver shut down setting packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 0001101s 2 se000lbc000 1 cls 7 cls 6 cls 5 cls 4 cls 3 cls 2 cls 1 cls 0 000st 5 st 4 st 3 st 2 st 1 st 0 table b-18 setting number bit definitions s setting name 0 shut down 1 1 shut down 2 spi packets host-to-decoder packet descriptions motorola MC68175 technical data sheet, rev. 1 b-19 frame assignment packets the flex protocol defines that each address of a flex pager is assigned a home frame and a pager collapse. this information is determined by the service provider. the flexchip ic must be configured so that a frame that is assigned by one or more of the addresses home frames and pager collapses has its corresponding configuration bit set. for example, if the flexchip ic has one enabled address and it is assigned to frame 3 with a battery cycle of 4, the af bits for frames 3, 19, 35, 51, 67, 83, 99, and 115 should be set and the af bits for all other frames should be cleared. there are 8 frame assignment packets. the ids for these packets range from 32 to 39 (decimal). frame range (f) this value determines which sixteen frames correspond to the sixteen af bits in the packet according to the following table. at least one of these bits must be set when the flexchip ic is turned on by setting the on bit in the control packet. the value after reset = 0. table b-19 frame assignment packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 00100f 2 f 1 f 0 2 00000000 1af 15 af 14 af 13 af 12 af 11 af 10 af 9 af 8 0af 7 af 6 af 5 af 4 af 3 af 2 af 1 af 0 table b-20 frame range bit definition f 2 f 1 f 0 af 15 af 0 0 0 0 frame 127 frame 112 0 0 1 frame 111 frame 96 0 1 0 frame 95 frame 80 0 1 1 frame 79 frame 64 1 0 0 frame 63 frame 48 1 0 1 frame 47 frame 32 1 1 0 frame 31 frame 16 1 1 1 frame 15 frame 0 b-20 MC68175 technical data sheet, rev. 1 motorola spi packets host-to-decoder packet descriptions assigned frame (af) if a bit is set, the flexchip ic will consider the corresponding frame to be assigned via an addresss home frame and pager collapse. the value after reset = 0. user address enable packet the user address enable packet is used to enable and disable the 16 user address words. although the host is allowed to change the user address words while the flexchip ic is decoding flex signals, the host must disable a user address word before changing it. the id of the user address enable packet is 120 (decimal). when a user address enable (uae) bit is set, the corresponding user address word is enabled. when it is cleared, the corresponding user address word is disabled. uae 0 corresponds to the user address word configured using a packet id of 128, and uae 15 corresponds to the user address word configured using a packet id of 143. in some instances, if an invalid flex messaging address is programmed, it will not be detected even when the address is enabled. the value after reset = 0. user address assignment packets the flexchip ic has sixteen user address words. each word can be programmed to be a short address or part of a long address. the addresses are configured using the address assignment packets. each user address can be configured as long or short and tone-only or regular. although the host is allowed to send these packets while the flexchip ic is on, the host must disable the user address word by clearing the corresponding uae bit in the user address enable packet before changing any of the bits in the corresponding user address assignment packet. this method allows for easy reprogramming of user addresses without disrupting normal operation. the ids for these packets range from 128 to 143 (decimal). table b-21 user address enable packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 01111000 2 00000000 1 uae 15 uae 14 uae 13 uae 12 uae 11 uae 10 uae 9 uae 8 0 uae 7 uae 6 uae 5 uae 4 uae 3 uae 2 uae 1 uae 0 spi packets host-to-decoder packet descriptions motorola MC68175 technical data sheet, rev. 1 b-21 user address word number (a 0 Ca 3 ) this specifies which address word is being configured. having all 0s in this field corresponds to address index zero (ai = 0) in the address packet received from the flexchip ic when an address is detected. (see address packet on page b-23.) long address (la) when this bit is set, the address is considered a long address. both words of a long address must have this bit set. the first word of a long address must have an even user address word number and the second word must be in the address index immediately following the first word. long addresses of the 2-3 and 2-4 set (see flex capcodes on page a-21) must be programmed to higher user address word numbers than long addresses of the 1-2, 1-3, and 1-4 set. tone-only address (toa) when this bit is set, the flexchip ic will consider this address a tone-only address and will not decode a vector word when the address is received. if the toa bit of a long address word is set, the toa bit of the other word of the long address must also be set. address word (a 0 Ca 20 ) this is the 21-bit value of the address word. valid flex messaging addresses must be used. in some instances, if an invalid flex messaging address is programmed, it will not be detected even when the address is enabled. table b-22 user address assignment packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 1000a 3 a 2 a 1 a 0 2 0 la toa a 20 a 19 a 18 a 17 a 16 1a 15 a 14 a 13 a 12 a 11 a 10 a 9 a 8 0a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 b-22 MC68175 technical data sheet, rev. 1 motorola spi packets decoder-to-host packet descriptions decoder-to-host packet descriptions the following sections describe the packets of information that will be sent from the flexchip ic to the host. in all cases the packets are sent msb first (bit 7 of byte 3 = bit 31 of the packet = msb). the flexchip ic decides what data should be sent to the host. if the flexchip ic is disabled through the checksum feature (see checksum packet on page b-6), the part id packet will be sent. data packets relating to data received over the air are buffered in the 32 packet transmit buffer. the data packets include block information word packets, address packets, vector packets, and message packets. if the flexchip ic is enabled and there is data in the transmit buffer, a packet from the transmit buffer will be sent. if the flexchip ic is enabled and no data packet or part id packet is pending, the flexchip ic will send the status packet (which is not buffered). in the event of a buffer overflow, the flexchip ic will automatically stop decoding and clear the buffer information. block information word packet the block information field is the first field following the synchronization codes of the flex protocol (see appendix a ). this field contains information about the frame, such as number of addresses and messages, as well as information about current time. the first block information word of each phase is used internally to the flexchip ic and is never transmitted to the host. all time and date block information words (f = 001, 010, or 101) can be optionally sent to the host by setting the sbi bit in the control packet. (see control packet on page b-10.) when the sbi bit is set and a block information word is received with an uncorrectable number of bit errors, the flexchip will send the block information word to the host with the e bit set regardless of the value of the f field in the block information word. the flexchip ic does not support decoding of the vector and figure b-5 flexchip ic spi transmit functional block diagram part id register 32 32 data packet fifo transmit buffer status register spi transmit register miso mux 32 32 32 32 aa1343 spi packets decoder-to-host packet descriptions motorola MC68175 technical data sheet, rev. 1 b-23 message words associated with the data/system message block info word (f = 101). the id of a block information word packet is 0 (decimal). . address packet the address field follows the block information field in the flex protocol. see appendix a for additional information. it contains all of the addresses in the frame. if less than three bit errors are detected in a received address word and it matches an enabled address assigned to the flexchip ic, an address packet will be sent to the host processor. the address packet contains assorted data about the address and its associated vector and message. the id of an address packet is 1 (decimal). table b-23 block information word packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 00000000 2ep 1 p 0 xxf 2 f 1 f 0 1xxs 13 s 12 s 11 s 10 s 9 s 8 0s 7 s 6 s 5 s 4 s 3 s 2 s 1 s 0 note: eset if more than 2 bit errors are detected in the word or if the check character calculation fails after error correction has been performed pphase on which the block information word was found (0=a, 1=b, 2=c, 3=d) xunused bits; the value of these bits is not guaranteed fword format type; the value of these bits modify the meaning of the s bits in this packet as described in the following table; if the e bit is not set, this field will be one of 001, 010, or 101 sthese are the information bits of the block information word. the definition of these bits depend on the f bits in this packet. table b-24 describes the block information words that the flexchip ic decodes. refer to appendix a for detailed information about these block information words. table b-24 block information word definitions f 2 f 1 f 0 s 13 s 12 s 11 s 10 s 9 s 8 s 7 s 6 s 5 s 4 s 3 s 2 s 1 s 0 description 001 m 3 m 2 m 1 m 0 d 4 d 3 d 2 d 1 d 0 y 4 y 3 y 2 y 1 y 0 month, day, year 010 s 2 s 1 s 0 m 5 m 4 m 3 m 2 m 1 m 0 h 4 h 3 h 2 h 1 h 0 second, minute, hour 101 z 9 z 8 z 7 z 6 z 5 z 4 z 3 z 2 z 1 z 0 a 3 a 2 a 1 a 0 system message b-24 MC68175 technical data sheet, rev. 1 motorola spi packets decoder-to-host packet descriptions priority address (pa) this bit is set if the address was received as a priority address. phase (p) these bits identify the phase on which the address was detected (0 = a, 1 = b, 2 = c, 3 = d). long address type (la) this bit is set if the address was programmed in the flexchip ic as a long address. address index (ai) valid values are 0 through 15 and 128 through 143. the index identifies which of the addresses was detected. values 0 through 15 will correspond to the sixteen programmable address words. values 128 through 143 will correspond to the sixteen temporary addresses. for long addresses, the address detect packet will only be sent once and the index will refer to the second word of the address. tone only address (toa) this bit is set if the address was programmed in the flexchip ic as a tone-only address. no vector word will be sent for tone-only addresses. word number (wn) of vector (2C87) these bits describe the location in the frame of the vector word for the detected address. this value is invalid for this packet if the toa bit is set. unused bits (x) the value of these bits is not guaranteed. table b-25 address packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 00000001 2pap 1 p 0 laxxxx 1ai 7 ai 6 ai 5 ai 4 ai 3 ai 2 ai 1 ai 0 0 toa wn 6 wn 5 wn 4 wn 3 wn 2 wn 1 wn 0 spi packets decoder-to-host packet descriptions motorola MC68175 technical data sheet, rev. 1 b-25 vector packet the vector field follows the address field (see appendix a ). each vector packet must be matched to its corresponding address packet. the id of the vector packet is the word number where the vector word was received in the frame. this value corresponds to the wn bits sent in the associated address packet. the phase information must also match in both the address packet and the vector packet. it is important to note for long addresses, the first message word will be transmitted in the word location immediately following the associated vector.the word number (identified by b 6 to b 0 ) in the vector packet will indicate the message start of the second message word if the message is longer than 1 word. there are several types of vectors: ? short message/tone only vector ? three types of numeric vectors ? hex/binary vector ? alphanumeric vector ? secure message vector ? short instruction vector each is described in the following pages. a detailed description of the flex software protocol requirements is provided in appendix a . four of the vectors (hex/binary, alphanumeric, secure message, and short instruction) enable the flexchip ic to begin the all frame mode. this mode is required to allow for the decoding of temporary addresses and/or fragmented messages. the host disables the all frame mode after the proper time by writing to the decoder via the all frame mode packet. for any address packet sent to the host (except tone-only addresses), a corresponding vector packet will always be sent. if more than two bit errors are detected (via bch calculations, parity calculations, check character calculations, or value validation) in the vector word the e bit will be set and the message words will not be sent. the numeric, hex/binary, alphanumeric, and secure message vector packets have associated message word packets in the message field. the host must use the n and b bits of the vector word to calculate what message word locations are associated with the vector. both the message word locations and the phase must match. the short instruction vector is used for assigning temporary addresses that may be associated with a group call. b-26 MC68175 technical data sheet, rev. 1 motorola spi packets decoder-to-host packet descriptions short message / tone only vector . table b-26 short message / tone only vector packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 30wn 6 wn 5 wn 4 wn 3 wn 2 wn 1 wn 0 2ep 1 p 0 xxv 2 v 1 v 0 1xxd 11 d 10 d 9 d 8 d 7 d 6 0d 5 d 4 d 3 d 2 d 1 d 0 t 1 t 0 notes: 1. v: = 010 for a short message/tone only vector wnword number of vector (2C87 decimal); describes the location of the vector word in the frame eset if more than 2 bit errors are detected in the word or, if after error correction, the check character calculation fails pphase on which the vector was found (0 = a, 1 = b, 2 = c, 3 = d) ddata bits whose definition depend on the value of t in this packet according to the following table 2. if this vector is received on a long address and the e bit in this packet is not set, the decoder will send a message packet from the word location immediately following the vector packet. except for the short message on a non-network address (t = 0), all message bits in the message packet are unused and should be ignored table b-27 short message / tone only vector definitions t 1 t 0 d 11 d 10 d 9 d 8 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 description 00 c 3 c 2 c 1 c 0 b 3 b 2 b 1 b 0 a 3 a 2 a 1 a 0 first 3 numeric chars 1 01 s 8 s 7 s 6 s 5 s 4 s 3 s 2 s 1 s 0 s 2 s 1 s 0 8 sources (s) and 9 unused bits (s) 10 s 1 s 0 r 0 n 5 n 4 n 3 n 2 n 1 n 0 s 2 s 1 s 0 8 sources (s), message number (n), message retrieval flag (r) 2 , and 2 unused bits (s) 11 spare message type notes: 1. for long addresses, an extra 5 characters are sent in the message packet immediately following the vector packet. 2. for a description of the r and n bits see the description of the same bits for numeric messages in appendix a . 3. t = message typethese bits define the meaning of the d bits in this packet. x = unused bitsthe value of these bits is not guaranteed. spi packets decoder-to-host packet descriptions motorola MC68175 technical data sheet, rev. 1 b-27 numeric vector packet vector type identifier (v) additional bit descriptors table b-28 numeric vector packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 30wn 6 wn 5 wn 4 wn 3 wn 2 wn 1 wn 0 2ep 1 p 0 xxv 2 v 1 v 0 1xxk 3 k 2 k 1 k 0 n 2 n 1 0n 0 b 6 b 5 b 4 b 3 b 2 b 1 b 0 table b-29 numeric vector definitions v 2 v 1 v 0 name description 011 standard numeric format no special formatting of characters is specified. 100 special format numeric vector formatting of the received characters is predetermined by special rules in the host. see flex message word definitions on page a-7. 111 numbered numeric vector the received information has been numbered by the service provider to indicate all messages have been properly received. table b-30 additional bit descriptor definitions for numeric vector packets designator definition wn this is the word number of vector (2C87 decimal) that describes the location of the vector word in the frame. e this bit is set if more than 2 bit errors are detected in the word, if the check character calculation fails after error correction has been performed, or if the vector value is determined to be invalid. p these bits define the phase on which the vector was found (0 = a, 1 = b, 2 = c, 3 = d). k these are the beginning check bits of the message. b-28 MC68175 technical data sheet, rev. 1 motorola spi packets decoder-to-host packet descriptions n these bits define the number of words in the message including the second vector word for long addresses (000 = 1 word message, 001 = 2 word message, etc.). for long addresses, the first message word is located in the word location that immediately follows the associated vector. b these bits define the word number of the message start in the message field (3C87 decimal). for long addresses, the word number indicates the location of the second message word. x these are unused bits. the value of these bits is not guaranteed. table b-30 additional bit descriptor definitions for numeric vector packets designator definition spi packets decoder-to-host packet descriptions motorola MC68175 technical data sheet, rev. 1 b-29 hex / binary, alphanumeric, and secure message vector vector type identifier (v) additional bit descriptors table b-31 hex / binary, alphanumeric, and secure message vector packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 30wn 6 wn 5 wn 4 wn 3 wn 2 wn 1 wn 0 2ep 1 p 0 xxv 2 v 1 v 0 1xxn 6 n 5 n 4 n 3 n 2 n 1 0n 0 b 6 b 5 b 4 b 3 b 2 b 1 b 0 table b-32 vector type identifier definition v 2 v 1 v 0 type 000 secure 101 alphanumeric 110 hex / binary table b-33 additional bit descriptor definitions for numeric vector packets designator definition wn this is the word number of vector (2C87 decimal) and it describes the location of the vector word in the frame. e this bit is set if more than 2 bit errors are detected in the word, if the check character calculation fails after error correction has been performed, or if the vector value is determined to be invalid. p these bits define the phase on which the vector was found (0 = a, 1 = b, 2 = c, 3 = d) n these bits define the number of message words in this frame including the first message word that immediately follows a long address vector. valid values are 1C 85 decimal. b word number of message starts in the message field. valid values are 3C87 decimal. note: for long addresses, the first message packet is sent from the word location immediately following the word location of the vector packet. the b bits indicate the second message word in the message field if one exists. x these are unused bits. the value of these bits is not guaranteed. b-30 MC68175 technical data sheet, rev. 1 motorola spi packets decoder-to-host packet descriptions short instruction vector table b-34 short instruction vector packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 30wn 6 wn 5 wn 4 wn 3 wn 2 wn 1 wn 0 2ep 1 p 0 xxv 2 v 1 v 0 1xxd 10 d 9 d 8 d 7 d 6 d 5 0d 4 d 3 d 2 d 1 d 0 i 2 i 1 i 0 table b-35 short instruction vector packet bit descriptions designator description v v = 001 for a short instruction vector wn this indicates the word number of the vector (2C87 decimal) and describes the location of the vector word in the frame. e this bit is set if more than 2 bit errors are detected in the word or, if after error correction, the check character calculation fails. p these bits define the phase on which the vector was found . (0 = a, 1 = b, 2 = c, 3 = d) d these are data bits whose definition depend on the i bits in this packet according to the table b-36 . note that if this vector is received on a long address and the e bit in this packet is not set, the decoder will send a message packet immediately following the vector packet. all message bits in the message packet are unused and should be ignored. table b-36 short instruction vector definition i 2 i 1 i 0 d 10 d 9 d 8 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 description 000 a 3 a 2 a 1 a 0 f 6 f 5 f 4 f 3 f 2 f 1 f 0 temporary address assignment 1 001 reserved 010 reserved 011 reserved 100 reserved 101 reserved spi packets decoder-to-host packet descriptions motorola MC68175 technical data sheet, rev. 1 b-31 message packet the message field follows the vector field in the flex protocol. it contains the message data, checksum information, and may contain fragment numbers and message numbers. see appendix a for additional information. if the error bit of a vector word is not set and the vector word indicates that there are message words associated with the page, the message words are sent in message packets. the id of the message packet is the word number where the message word was received in the frame. 110 reserved 111 reserved for test notes: 1. assigned temporary address (a) and assigned frame (f). see appendix c for additional information. 2. i = instruction typethese bits define the meaning of the d bits in this packet. x = unused bitsthe value of these bits is not guaranteed. table b-37 message packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 0 wn6 wn5 wn4 wn3 wn2 wn1 wn0 2ep 1 p 0 i 20 i 19 i 18 i 17 i 16 1i 15 i 14 i 13 i 12 i 11 i 10 i 9 i 8 0i 7 i 6 i 5 i 4 i 3 i 2 i 1 i 0 note: wn = word number of message word (3C87 decimal)describes the location of the message word in the frame e is set if more than 2 bit errors are detected in the word. p = phase on which the message word was found (0 = a, 1 = b, 2 = c, 3 = d) i = information bits of the message wordthe definitions of these bits depend on the vector type and which word of the message is being received. see appendix a for a detailed description of these bits. table b-36 short instruction vector definition i 2 i 1 i 0 d 10 d 9 d 8 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 description b-32 MC68175 technical data sheet, rev. 1 motorola spi packets decoder-to-host packet descriptions status packet the status packet contains various types of information that the host may require. the status packet will be sent to the host whenever the flexchip ic is polled and has no other data to send. the flexchip ic can also prompt the host to read the status packet due to events for which the flexchip ic was configured to send it (see configuration packet on page b-8 and control packet on page b-10 for a detailed description of the bits). the flexchip ic prompts the host to read a status packet if one of the following is true: ? the smu bit in the status packet and the sme bit in the configuration packet are set. ? the mt bit in the status packet and the mte bit in the configuration packet are set. ? the eof bit in the status packet is set. ? the lbu bit in the status packet is set. ? the boe bit in the status packet is set. the id of the status packet is 127 (decimal). frame info valid (fiv) the fiv bit is set when a valid frame info word has been received since becoming synchronous to the system and the f and c fields contain valid values. if this bit is clear, no valid frame info words have been received since the flexchip ic became synchronous to the system. this value will change from 0 to 1 at the end of block 0 of the frame in which the 1st frame info word was properly received. it will be cleared when the flexchip ic goes into asynchronous mode. this bit is initialized to 0 when the flexchip ic is reset and when the flexchip ic is turned off by clearing the on bit in the control packet. table b-38 status packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 01111111 2 fiv f 6 f 5 f 4 f 3 f 2 f 1 f 0 1smlbxxc 3 c 2 c 1 c 0 0 smu lbu x mt x eof x boe spi packets decoder-to-host packet descriptions motorola MC68175 technical data sheet, rev. 1 b-33 current frame number (f) this value is updated every frame regardless of whether the flexchip ic needs to decode the frame. this value will change to its proper value for a frame at the end of block 0 of the frame. the value of these bits is not guaranteed when fiv is 0. synchronous mode (sm) this bit is set when the flexchip ic is synchronous to the system. the flexchip ic will set this bit when the first synchronization words are received. it will clear this bit when synchronization to the flex signal is lost. this bit is initialized to 0 when the flexchip ic is reset and when it is turned off by clearing the on bit in the control packet. low battery (lb) the lb bit is set to the value last read from the lobat pin. the host controls when the lobat pin is read via the receiver control packets. this bit is initialized to 0 at reset. it is also initialized to the inverse of the lbp bit in the configuration packet when the flexchip ic is turned on by setting the on bit in the control packet. current system cycle number (c) this value is updated every frame regardless of whether the flexchip ic needs to decode the frame.this value will change to its proper value for a frame at the end of block 0 of the frame. the value of these bits is not guaranteed when fiv is 0. synchronous mode update (smu) the sm bit is set if the sm bit has been updated in this packet. when the flexchip ic is turned on, this bit will be set when the first synchronization words are found (sm changes to 1) or when the first synchronization search window after the flexchip ic is turned on expires (sm stays 0). the latter condition gives the host the option of assuming the paging device is in range when it is turned on, and displaying out-of- range only after the initial a search window expires. after the initial synchronous mode update, the smu bit will be set whenever the flexchip ic transitions from/to synchronous mode. cleared when read. changes in the sm bit due to turning off the flexchip ic will not cause the smu bit to be set.this bit is initialized to 0 when the flexchip ic is reset. low battery update (lbu) the lbu bit is set if the value on two consecutive reads of the lobat pin yielded different results and is cleared when read. the host controls when the lobat pin is read via the receiver control packets. changes in the lb bit due to turning on the flexchip ic will not cause the lbu bit to be set. this bit is initialized to 0 when the flexchip ic is reset. minute time-out (mt) the mt bit is set if one minute has elapsed. the bit is cleared when read. this bit is initialized to 0 when the flexchip ic is reset. b-34 MC68175 technical data sheet, rev. 1 motorola spi packets decoder-to-host packet descriptions end of frame (eof) the eof bit is set when the flexchip ic is in all frame mode and the end of frame has been reached. the flexchip ic is in all frame mode if the all frames mode enable counter is non-zero, if any temporary address enabled counter is non-zero, or if the faf bit in the all frame mode packet is set. the bit is cleared when read. this bit is initialized to 0 when the flexchip ic is reset. buffer overflow error (boe) the boe bit is set when information has been lost due to slow host response time. when the spi transmit buffer on the flexchip ic overflows, the flexchip ic clears the transmit buffer, turns off decoding by clearing the on bit in the control packet, and sets this bit. the bit is cleared when read. this bit is initialized to 0 when the flexchip ic is reset. unused bits (x) the value of these bits is not guaranteed. part id packet the part id packet is sent by the flexchip ic whenever the flexchip ic is disabled due to the checksum feature (see checksum packet on b-6). since the flexchip ic is disabled after reset, this is the first packet that will be received by the host after reset. the id of the part id packet is 255 (decimal) . model (mdl) this identifies the flexchip model. current value is 0. compatibility id (cid) this value describes what other parts with the same model number are compatible with this part. current value is 1. any future versions of flexchip that have mdl set to 0 and cid 0 set to 1 will be 100% compatible to this version. table b-39 part id packet bit assignments byte bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 3 11111111 2 mdl 1 mdl 0 cid 13 cid 12 cid 11 cid 10 cid 9 cid 8 1 cid 7 cid 6 cid 5 cid 4 cid 3 cid 2 cid 1 cid 0 0 rev 7 rev 6 rev 5 rev 4 rev 3 rev 2 rev 1 rev 0 spi packets decoder-to-host packet descriptions motorola MC68175 technical data sheet, rev. 1 b-35 revision (rev) this identifies the revision and manufacturer of the flexchip. currently defined values are as follows. table b-40 flexchip revisions rev description 0 pre-production parts 1 reserved 2 motorola semiconductor products sector production parts 3 reserved 4 motorola semiconductor products sector samples b-36 MC68175 technical data sheet, rev. 1 motorola spi packets decoder-to-host packet descriptions motorola MC68175 technical data sheet, rev. 1 c-1 appendix c application notes receiver control introduction the flexchip ic has eight programmable receiver control lines (s0Cs7). the host has control of the receiver warm up and shut down timing, as well as all of the various settings on the control lines through configuration registers on the flexchip ic. the configuration registers for most settings allow the host to configure: 1. what setting is applied to the control lines, 2. how long to apply the setting, and 3. if the lobat input pin is polled before changing from the setting. with this programmability, the flexchip ic is able to interface with many off-the- shelf receiver ics, such as the mc13150 and mc3374. for details on the configuration of the receiver control settings, see receiver control configuration packets on page b-14. receiver settings at reset the receiver control ports are three-state outputs that are set to the high-impedance state when the flexchip ic is reset and until the corresponding frs bit in the receiver line control packet is set, or until the flexchip ic is turned on by setting the on bit in the control packet. this allows the designer to force the receiver control lines to the receiver off setting with external pull-up or pull-down resistors before the host can configure these settings in the flexchip ic. when the flexchip ic is turned on, the receiver control ports are driven to the settings configured by the receiver control configuration packets until the flexchip ic is reset again. c-2 MC68175 technical data sheet, rev. 1 motorola application notes receiver control normal receiver warm up sequence the flexchip ic allows for up to six steps associated with warming up the receiver. when the flexchip ic turns on the receiver while decoding, it starts the warm up sequence 160 ms before it requires valid signals at the exts0 and exts1 input pins. the first step of the warm up sequence involves leaving the receiver control lines in the off state for the amount of time programmed for warm up off time. at the end of the warm up off time, the first warm up setting, if enabled, is applied to the receiver control lines for the amount of time programmed for that setting. each subsequent warm up setting is applied to the receiver control lines for their corresponding time until a disabled warm up setting is found. at the end of the last used warm up setting, the 1600 sps sync setting or the 3200 sps sync setting is applied to the receiver control lines depending on the current state of the flexchip ic. the sum total of all of the used warm up times and the warm up off time must not exceed 160 ms. if it exceeds 160 ms, the flexchip ic will execute the receiver shut down sequence at the end of the 160 ms warm up period. figure c-1 below shows the receiver warm up sequence while decoding when all warm up settings are enabled. first receiver warm up sequence when the flexchip ic is turned on by setting the on bit in the control packet, the first warm up setting, if enabled, is applied to the receiver control lines for the amount of time programmed for that setting. each subsequent warm up setting is applied to the receiver control lines for their corresponding time until a disabled warm up setting is found. once a disabled warm up setting is found, the 3200 sps sync setting is applied to the receiver control lines and the decoder does not expect valid signal until after the 3200 sps sync warm up time has expired. figure c-2 on page c-3 below shows the receiver warm up sequence when the flexchip ic is first turned on and when all warm up settings are enabled. figure c-1 receiver warm up sequence while decoding. warm up setting 5 warm up setting 4 warm up setting 3 warm up setting 2 warm up setting 1 1600 sps or 3200 sps sync setting off receiver control line 160 ms warm up off time warm up time 1 warm up time 2 warm up time 3 warm up time 4 warm up time5 exts1 & exts0 signals are expected to be valid here possible lobat check possible lobat check possible lobat check possible lobat check possible lobat check possible lobat check setting aa1236 application notes receiver control motorola MC68175 technical data sheet, rev. 1 c-3 receiver shut down sequence the flexchip ic allows for up to three steps associated with shutting down the receiver. when the flexchip ic decides to turn off the receiver, the first shut down setting, if enabled, is applied to the receiver control lines for the corresponding shut down time. at the end of the last used shut down time, the off setting is applied to the receiver control lines. if the first shut down setting is not enabled, the flexchip ic will transition directly from the current on setting to the off setting. figure c-3 shows the receiver turn off sequence when all shut down settings are enabled. if the receiver is on or being warmed up when the decoder is turned off (by clearing the on bit in the control packet), the flexchip ic will execute the receiver shutdown sequence. if the flexchip ic is executing the shut down sequence when the flexchip ic is turned on (by setting the on bit in the control packet), the flexchip ic will complete the shut down sequence before starting the warm up sequence. figure c-2 receiver warm up sequence when decoding turned on figure c-3 receiver shut down sequence warm up setting 5 warm up setting 4 warm up setting 3 warm up setting 2 warm up setting 1 3200 sps sync setting off receiver control line setting warm up time 1 warm up time 2 warm up time 3 warm up time 4 warm up time5 exts1 & exts0 signals are expected to be valid here. possible lobat check possible lobat check possible lobat check possible lobat check possible lobat check possible lobat check warm up time sync 3200 sps aa1237 shut down setting 1 1600 sps or 3200 sps sync or data setting off receiver control line setting shut down time 1 shut down time 2 shut down setting 2 possible lobat check possible lobat check possible lobat check aa1238 c-4 MC68175 technical data sheet, rev. 1 motorola application notes receiver control miscellaneous receiver states in addition to the warm up and shut down states, the flexchip ic has four other receiver states. when these settings are applied to the receiver control lines, the flexchip ic will be decoding the exts1 and exts0 input signals. the timing of these signals and their duration depends on the data the flexchip ic decodes. because of this, there is no time setting associated with these settings. the four settings are as follows: ? 1600 sps sync setting this setting is applied when the flexchip ic is searching for a 1600 symbols per second signal. ? 3200 sps sync setting this setting is applied when the flexchip ic is searching for a 3200 symbols per second signal. ? 1600 sps data setting this setting is applied after the flexchip ic has found the c or c sync word in a 1600 symbols per second frame. ? 3200 sps data setting this setting is applied after the flexchip ic has found the c or c sync word in a 3200 symbols per second frame. figure c-4 below shows some examples of how these settings will be used in the flexchip ic. figure c-4 examples of receiver control transitions 1600 sps sync setting 1600 sps data or 3200 sps data or last used warm up setting receiver control line setting possible lobat check possible lobat check possible lobat check 3200 sps sync setting 3200 sps data setting sync 1 frame info sync 2 block 0 block 10 flex signal 1600sps sync setting 1600 sps data or 3200 sps data or last used warm up setting receiver control line setting possible lobat check possible lobat check 1600 sps data setting example #1 example #2 aa1239 application notes message building motorola MC68175 technical data sheet, rev. 1 c-5 low battery detection the flexchip ic can be configured to poll the lobat input pin at the end of every receiver control setting. this check can be enabled or disabled for each receiver control setting. if the poll is enabled for a setting, the pin will be read just before the flexchip ic changes the receiver control lines from that setting to another setting. the flexchip ic will send a status packet whenever the value on two consecutive reads of the lobat pin yields different results. message building a simple message consists of an address packet followed by a vector packet indicating the word numbers of associated message packets.the tables below show a more complex example of receiving three messages and two block information word packets in the first two blocks of a 2 phase 3200 bps, flex frame. note: the messages shown may be portions of fragmented or group messages. furthermore, in the case of a 6400 bps flex signal, there would be four phases: a, b, c and d, and in the case of a 1600 bps signal there would be only a single phase a. c-6 MC68175 technical data sheet, rev. 1 motorola application notes message building table c-1 shows the block number, word number (wn) and word content of both phases a and c. note contents of words not meant to be received by the host are left blank. each phase begins with a block information word (wn 0), that is not sent to the host. the first message is in phase a and has an address (wn 3), vector (wn 7), and three message words (wn 9C11). the second message is also in phase a and has an address (wn 4), a vector (wn 8), and four message words (wn 12C15). the third message is in phase c and has a 2 word long address (wn 5C6) followed by a vector (wn 10) and three message words. since the third message is sent on a long address, the first message word (wn 11) begins immediately after the vector. the vector indicates the location of the second and third message words (wn 14C15). table c-1 flex signal block word number phase a phase c 0 0 biw1 biw1 1 biw 3 address 1 biw 4 address 2 5 long address 3 word 1 6 long address 3 word 2 7 vector 1 1 8 vector 2 9 message 1, 1 10 message 1, 2 vector 3 11 message 1, 3 message 3, 1 12 message 2, 1 13 message 2, 2 14 message 2, 3 message 3, 2 15 message 2, 4 message 3, 3 application notes message building motorola MC68175 technical data sheet, rev. 1 c-7 table c-2 shows the sequence of packets received by the host. the flexchip processes the flex signal one block at a time, and one phase at a time. thus, the address and vector information in block 0 phase a is packetized and sent to the host in packets 1C3. then information in block 0 phase c, two block information words and one long address, is packetized and sent to the host in packets 4C6. packets 7C18 correspond to information in block 1, processed in phase a first and phase c second. the first message is built by relating packets 1, 3, and 8C10. the second message is built by relating packets 2, 7, and 11C14. the third message is built by relating packets 6 and 15C18. additionally, the host may process block information in packets 4 and 5 for time setting information. table c-2 flexchip packet sequence packet packet type phase word number comment 1st address a n.a. (7) address 1 has a vector located at wn 7. 2nd address a n.a. (8) address 2 has a vector located at wn 8. 3rd vector a 7 vector for address 1: message words located at wn = 9 to 11, phase a 4th biw c n.a. if biws enabled, then biw packet sent 5th biw c n.a. if biws enabled, then biw packet sent 6th long address c n.a. (10) long address 3 has a vector beginning in word 10 of phase c. 7th vector a 8 vector for address 2: message words located at wn = 12 to 15, phase a 8th message a 9 message information for address 1 9th message a 10 message information for address 1 10th message a 11 message information for address 1 11th message a 12 message information for address 2 12th message a 13 message information for address 2 13th message a 14 message information for address 2 14th message a 15 message information for address 2 15th vector c 10 vector for long address 3: message words located at wn = 14 - 15, phase c 16th message c 11 second word of long vector is first message information word of address 3. 17th message c 14 message information for address 3 18th message c 15 message information for address 3 c-8 MC68175 technical data sheet, rev. 1 motorola application notes building a fragmented message building a fragmented message the longest message that will fit into a frame is eighty-four code words total of message data. three alpha characters per word yields a maximum message of 252 characters in a frame assuming no other traffic. messages longer than this value must be sent as several fragments. additional fragments can be expected when the continue bit in the 1st message word is set. this causes the pager to examine every following frame for an additional fragment until the last fragment with the continue bit reset is found. the only requirement relating to the placement in time of the remaining fragments is that no more than thirty-two frames (1 minute) or 128 frames (4 minutes) as indicated by the service provider may pass between fragment receptions. each fragment contains a check sum character to detect errors in the fragment, a fragment number 0, 1, or 2 to detect missing fragments, a message number to identify which message the fragment is a part, and the continue bit, which either indicates that more fragments are in queue or that the last fragment has been received. all of this information is described in flex message word definitions on a-7. the following describes the sequence of events between the host and the flexchip ic required to handle a fragmented message: 1. the host receives a vector indicating one of the following types: 2. the flexchip ic increments the all frame mode counter inside the flexchip ic and begin to decode all of the following frames. 3. the host receives the message packet(s) contained within that frame, followed by a status packet. the host must decide based on the message packet to return to normal decoding operation. if the message is indicated as fragmented by the message continued flag c being set in the message packet for a secure, alphanumeric or hex /binary message, then the host does not decrement the all frame mode counter at this time. the host decrements the counter if the message continued flag c is clear by writing the all frame mode packet to the flexchip ic with the daf bit = 1. if no other fragments, temporary addresses are pending or the faf bit is clear in table c-3 message type definition v 2 v 1 v 0 type 000 secure 101 alphanumeric 110 hex / binary application notes building a fragmented message motorola MC68175 technical data sheet, rev. 1 c-9 the all frame mode register, then the flexchip ic returns to normal operation. 4. the flexchip ic continues to decode all of the frames and passes any address information, vector information and message information to the host followed by a status packet indicating the end of the frame. if the message is indicated as fragmented by the message continued flag c in the message packet for a secure, alphanumeric or hex/binary message then the host remains in the receive mode expecting more information from the flexchip ic. 5. after the host receives the second and subsequent fragment with the message continued flag c = 1, it should decrement the all frame mode counter by sending an all frame mode packet to the flexchip ic with the daf bit = 1. alternatively, the host may choose to decrement the counter at the end of the entire message by decrementing the counter once for each fragment received. 6. when the host receives a message packet with the message continued flag c = 0, it will send two all frame mode packets to the flexchip ic with the daf bit = 1. the two packets decrement the count for the first fragment and the last fragment. this decrements the all frame mode counter to zero, if no other fragmented messages, or temporary addresses are pending or the faf bit is clear in the all frame mode register, and returns the flexchip ic to normal operation. 7. the above process must be repeated for each occurrence of a fragmented message. the host must keep track of the number of fragmented messages being decoded and insure the all frame mode counter decrements after each fragment or after each fragmented message. table c-4 alphanumeric message without fragmentation packet packet type phase all frame counter comment 1st address 1 a 0 address 1 is received 2nd vector 1 a 1 vector = alphanumeric type 3rd message a 1 message word received c bit = 0; no more fragments are expected. 4th tbd 0 host writes all frame mode packet to the flexchip ic with the daf bit = 1 note: tbdhost initiated packet. the flexchip ic returns a packet according to decoder-to-host packet descriptions on page b-22 . c-10 MC68175 technical data sheet, rev. 1 motorola application notes building a fragmented message table c-5 alphanumeric message with fragmentation packet packet type phase all frame counter comment 1st address 1 a 0 address 1 is received 2nd vector 1 a 1 vector = alphanumeric type 3rd message a 1 message word received c bit = 1, message is fragmented, more expected 4th status 1 end of frame indication ( eof = 1) 5th address 1 b 1 address 1 is received 6th vector 1 b 2 vector = alphanumeric type 7th message b 2 message word received c bit = 1, message is fragmented, more expected. 8th tbd 1 host writes all frame mode packet to the flexchip ic with the daf bit = 1 9th status 1 end of frame indication ( eof = 1) 10th address 1 a 1 address 1 is received 11th vector 1 a 2 vector = alphanumeric type 12th message a 2 message word received c bit = 0, no more fragments are expected. 13th tbd 1 host writes all frame mode packet to the flexchip ic with the daf bit = 1 14th tbd 0 host writes all frame mode packet to the flexchip ic with the daf bit = 1 note: tbdhost initiated packet. the flexchip ic returns a packet according to decoder-to-host packet descriptions on page b-22 . application notes operation of a temporary address motorola MC68175 technical data sheet, rev. 1 c-11 operation of a temporary address group messaging the flex protocol allows for a dynamic group call for the purpose of sending a common message to a group of paging devices. the dynamic group call approach assigns a temporary address, using the personal address and the short instruction vector. the temporary address must be disabled by the host after the message is completed. the flex protocol specifies sixteen addresses for the dynamic group call, which may be temporarily activated in a specific future frame (if the designated frame is equal to the present frame, the host is to interpret this as the next occurrence of this frame 4 minutes in the future.) the temporary address is valid for one message starting in the specified frame and remaining valid throughout the following frames to the completion of the message. if the message is not found in the specified frame (frame defined by a full 7-bit frame number), the host must disable the assigned temporary address. the following describes the sequence of events between the host and the flexchip ic required to handle a temporary address: 1. following an address packet, the host will receive a vector packet with v 2 v 1 v 0 = 001 and i 2 i 1 i 0 = 000 for a short instruction vector indicating a temporary address has been assigned to this pager. the vector packet will indicate which temporary address is assigned and the frame in which the temporary address is expected. 2. the flexchip ic will increment the corresponding temporary address counter and begin to decode all of the following frames. 3. the flexchip ic continues to decode all of the frames and passes any address information, vector information, and message information to the host, followed by a status packet indicating the end of each frame and the current frame number. 4. there are several scenarios that may occur with temporary addresses. a. the temporary address is not found in the frame assigned and therefore the host must terminate the temporary address mode by sending an all frame mode packet to the flexchip ic with the dta bit of the particular temporary address set. b. the temporary address is found in the frame it was assigned and was not a fragmented message. again, the host must terminate the temporary address mode by sending an all frame mode packet to the flexchip ic with the dta bit of the particular temporary address set. c-12 MC68175 technical data sheet, rev. 1 motorola application notes operation of a temporary address c. the temporary address is found in the assigned frame and it is a fragmented message. in this case, the host must follow the rules for operation of a fragmented message and determine the proper time to stop the all frame mode operation. in this case, the host must write to the daf bit with a 1 and the appropriate dta bit with a 1 in the all frame mode register in order to terminate both the fragmented message and the temporary address. 5. the above operation is repeated for every temporary address. motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. typical parameters which may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicals must be validated for each customer application by customers technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support life, or for any other application in which the failure of the motorola product could create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and are registered trademarks of motorola, inc. motorola, inc. is an equal opportunity/affirmative action employer. flex, flexchip, flexstack, and mfax are trademarks of motorola, inc. how to reach us: usa/europe/locations not listed : motorola literature distribution p.o. box 5405 denver, colorado 80217 303-675-2140 1 (800) 441-2447 mfax? : rmfax0@email.sps.mot.com touchtone (602) 244-6609 us & canada only (800) 774-1848 asia/pacific : motorola semiconductors h.k. ltd. 8b tai ping industrial park 51 ting kok road tai po, n.t., hong kong 852-26629298 technical resource center: 1 (800) 521-6274 dsp helpline dsphelp@dsp.sps.mot.com japan : nippon motorola ltd. spd, strategic planning office 4-32-1, nishi-gotanda shinagawa-ku, tokyo 141, japan 81-3-5487-8488 internet : http://www.motorola-dsp.com |
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